LC75852E-E ON Semiconductor, LC75852E-E Datasheet
LC75852E-E
Specifications of LC75852E-E
Related parts for LC75852E-E
LC75852E-E Summary of contents
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... Ordering number : EN4828A Overview The LC75852E and LC75852W are 1/2 duty dynamic LCD display drivers. In addition to being able to directly drive LCD panels with segments, they can also control up to four general-purpose output ports. These products also include a key scan circuit which allows them to accept input from keypads with keys ...
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... MID Output middle-level voltage V 2 MID Current drain LC75852E, 75852W = Conditions V DD CE, CL, DI, RES KI1 to KI5 CE, CL, DI, RES, KI1 to KI5 OSC OSC OSC CL, DI: Figure 1 CL, DI: Figure 1 CE, CL: Figure 1 CE, CL: Figure 1 CE, CL: Figure 1 CL: Figure 1 ...
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... When stopped with CL at the low level 2. When stopped with CL at the high level Pin Assignment LC75852E, 75852W Figure 1 No. 4828-3/16 ...
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... However, serial data can be input during a reset. Power supply connection. A supply voltage of between 4.5 and 6.0 V must provided Power supply ground connection. Must be connected to GND. SS LC75852E, 75852W Function is (f /512) Hz. O OSC CE: Chip enable CL: Synchronization clock DI: Transfer data DO: Output data ...
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... When stopped with CL at the low level 2. When stopped with CL at the high level CCB address......................[42H D90 ...........................Display data S0, S1 ................................Sleep control data K0, K1 ................................Key scan output/segment output selection data P0, P1 ................................Segment output port/general-purpose output port selection data SC ......................................Segment on/off control data LC75852E, 75852W No. 4828-5/16 ...
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... For example, if the output pin S4/P4 is set for use as a general-purpose output port, the output pin S4/P4 will output a high level when the display data SC.......................Segment on/off control data This control data controls the segment on/off states. SC Display state Off LC75852E, 75852W Segment outputs Oscillator Common outputs KS1 Operation Maximum number ...
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... D21 D22 S11 0 0 Segment off for both COM1 and COM2 0 1 Segment on for COM2 1 0 Segment on for COM1 1 1 Segments on for both COM1 and COM2 LC75852E, 75852W COM2 D10 D12 D14 D16 D18 D20 D22 D24 D26 D28 ...
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... This reduces the LSI power dissipation. However, the S1/P1 to S4/P4 output pins can be used as general-purpose output ports even in sleep mode if selected for such use by the P0 and P1 control data bits. LC75852E, 75852W KI4 KI5 ...
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... After the controller has finished reading the key data, the LSI clears the key data read request (by setting DO high) and performs another key scan. Note that since open drain output, a pull-up resistor of between 1 and 10 kΩ is required. LC75852E, 75852W ) or longer, a key data read request (DO is set to low) OSC ...
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... KI1 to KI5, and multiple key presses of keys on the lines for the output pins KS1 to KS6. However, if multiple key presses in excess of these limits occur, the LC75852 may recognize keys that were not pressed as having been pressed. Therefore, series diodes must be connected to each key. LC75852E, 75852W ) or longer, a key data read request (DO is set to low) OSC ...
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... S1/P1 to S4/P4 S43, COM1, COM2, KS1/S44 and KS2/S45 should be held low by setting the RES pin low at the same time as power is applied. Then, meaningless displays at power on can be prevented by transferring data from the controller and setting RES high when that transfer has completed. LC75852E, 75852W Figure 2 No. 4828-11/16 ...
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... Immediately following power on, these output pins are undefined until the control data S0 and S1 has been sent. 5. Since this output pin is an open-drain output, a pull-up resistor of between 1 and 10 kΩ is required. This pin is held high during the reset period even if key data is read. LC75852E, 75852W No. 4828-12/16 ...
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... Notes on Controller Display Data Transfer The LC75852 transfers the display data (D1 to D90) in two operations. To assure visual display quality, all the display data should be sent within shorter period. LC75852E, 75852W No. 4828-13/16 ...
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... When DO is low, the controller recognizes that a key has been pressed and reads the key data. During this operation t7 must obey the following condition: t7 > key data is read when DO is high, the key data (KD1 to KD30) and the sleep acknowledge data (SA) will be invalid. LC75852E, 75852W No. 4828-14/16 ...
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... OSC LC75852E, 75852W No. 4828-15/16 ...
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... SANYO believes information herein is accurate and reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual property rights or other rights of third parties. This catalog provides information as of November, 1997. Specifications and information herein are subject to change without notice. LC75852E, 75852W No. 4828-16/16 ...