ISL6146AFRZ-T7A Intersil, ISL6146AFRZ-T7A Datasheet - Page 3

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ISL6146AFRZ-T7A

Manufacturer Part Number
ISL6146AFRZ-T7A
Description
Hot Swap & Power Distribution LW VOLT ORING FET CONTRLR 3X3 8LD DFN
Manufacturer
Intersil
Datasheet

Specifications of ISL6146AFRZ-T7A

Product Category
Hot Swap & Power Distribution
Rohs
yes
Product
Controllers & Switches
Current Limit
6 A
Supply Voltage - Max
20 V
Supply Voltage - Min
1 V
Operating Temperature Range
- 40 C to + 125 C
Mounting Style
SMD/SMT
Package / Case
DFN-8
Input / Supply Voltage (max)
20 V
Input / Supply Voltage (min)
1 V
Number Of Channels
1
Supply Current
25 uA
Pin Descriptions
Ordering Information
ISL6146AFUZ
ISL6146AFUZ-T
ISL6146AFUZ-T7A
ISL6146AFUZ-TK
ISL6146AFRZ
ISL6146AFRZ-T
ISL6146AFRZ-T7A
ISL6146AFRZ-TK
ISL6146BFUZ
ISL6146BFUZ-T
ISL6146BFUZ-T7A
ISL6146BFUZ-TK
ISL6146BFRZ
ISL6146BFRZ-T
ISL6146BFRZ-T7A
ISL6146BFRZ-TK
ISL6146CFUZ
ISL6146B
ISL6146E
ISL6146C
MSOP/
DFN
PAD
4
4
5
6
7
8
Thermal Pad Connect to GND
PART NUMBER
(Notes 1, 2, 3)
SYMBOL
FAULT
VOUT
GND
OVP
ADJ
EN
Active low enable input to turn on the FET. Internally pulled high to BIAS through 2MΩ. Range: 0 to 24V
Programmable OV protection to prevent continued operation when the monitored voltage is too high. A back-to-back FET
configuration must be employed to implement the OVP capability. Range: 0V to 24V
Chip ground reference.
Open-Drain pull-down fault indicating output with internal on chip filtering (T
down this pin to GND as it detects a fault or a disabled input (EN = ‘0’ or EN = ‘1’).
Different types of faults and their detection mechanisms are discussed in more detail on page 17. These faults include:
Range: 0 to V
Resistor programmable V
connected to VOUT or can be connected through a 5kΩ to 100kΩ resistor to GND. Allows for adjusting the voltage difference
threshold to prevent unintended turn-off of the pass FET due to normal system voltage fluctuations.
Range: 0.4 to V
The second sensing node for external FET control and connected to the Load side (OR-ing MOSFET Drain). This is the
common connection point for multiple paralleled supplies. V
to be turned off. Range: 0V to 24V
a. GATE is OFF (GATE < V
b. V
d. V
e. V
c. FET G-D or G-S or D-S shorts.
f. Over-Temperature
IN
IN
IN
3
-V
< POR
< V
OUT
(Continued)
OUT
> 0.57V when ON.
OUT
L2H
OUT
6146A
6146A
6146A
6146A
46AF
46AF
46AF
46AF
6146B
6146B
6146B
6146B
46BF
46BF
46BF
46BF
6146C
MARKING
PART
IN
IN
+0.2V) when enabled [this condition is not reported on the ISL6146D and ISL6146E]
- V
OUT
Voltage Threshold (Vth) of the High Speed Comparator. This pin is either directly
ISL6146
TEMP RANGE
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
-40 to +125
(°C)
DESCRIPTION
OUT
8 Ld MSOP
8 Ld MSOP Tape and Reel
8 Ld MSOP Tape and Reel
8 Ld MSOP Tape and Reel
8 Ld 3x3 DFN
8 Ld 3x3 DFN Tape and Reel
8 Ld 3x3 DFN Tape and Reel
8 Ld 3x3 DFN Tape and Reel
8 Ld MSOP
8 Ld MSOP Tape and Reel
8 Ld MSOP Tape and Reel
8 Ld MSOP Tape and Reel
8 Ld 3x3 DFN
8 Ld 3x3 DFN Tape and Reel
8 Ld 3x3 DFN Tape and Reel
8 Ld 3x3 DFN Tape and Reel
8 Ld MSOP
is compared to V
FLT
PACKAGE
(Pb-free)
). The ISL6146 fault detection circuitry pulls
IN
to determine when the OR-ing FET has
M8.118
M8.118
M8.118
M8.118
L8.3x3J
L8.3x3J
L8.3x3J
L8.3x3J
M8.118
M8.118
M8.118
M8.118
L8.3x3J
L8.3x3J
L8.3x3J
L8.3x3J
M8.118
DWG. #
April 26, 2013
PKG.
FN7667.4

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