L4984DTR STMicroelectronics, L4984DTR Datasheet
L4984DTR
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L4984DTR Summary of contents
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... IEC61000-3-2 and JEIDA-MITI compliant SMPS in excess – Desktop PC, server, web server February 2013 This is information on a product in full production. Table 1. Device summary Order code L4984D L4984DTR Doc ID 023489 Rev 3 L4984 CCM PFC controller − Datasheet production data SSOP10 Package ...
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Contents Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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L4984 List of figures Figure 1. Electrical diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Description 1 Description The L4984 is a current-mode PFC controller operating with line-modulated fixed-off-time (LM-FOT) control. A proprietary LM-FOT modulator allows fixed-frequency operation for boost PFC converters as long as they are operated in CCM (continuous conduction mode). The chip ...
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L4984 2 Block diagram Figure 1. Electrical diagram … Doc ID 023489 Rev 3 Block diagram AM13217v1 5/35 ...
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Block diagram Table 2. Absolute maximum ratings Symbol VFF pin Other pins Figure 2. Pin connection (top view) Table 3. Thermal data Symbol ...
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L4984 Table 4. Pin functions (continued) N. Name 3 MULT VFF 6 PFC_OK 7 TIMER 8 GND Main input to the multiplier. This pin is connected to the rectified mains voltage via a resistor divider and provides ...
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Block diagram Table 4. Pin functions (continued) N. Name 8/35 Gate driver output. The totem pole output stage is able to drive Power MOSFETs and IGBTs capable of 600 mA source current and ...
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L4984 3 Electrical characteristics (Tj = -25 to 125 ° µF and R FF Table 5. Electrical characteristics Symbol Parameter Supply voltage V Operating range CC V Turn-on threshold CCOn V Turn-off threshold CCOff V V for ...
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Electrical characteristics Table 5. Electrical characteristics (continued) Symbol Parameter Line regulation I Input bias current INV V Internal clamp level INVCLAMP Gv Voltage gain GB Gain-bandwidth product Source current I COMP Sink current Upper clamp voltage V Burst-mode threshold COMP ...
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L4984 Table 5. Electrical characteristics (continued) Symbol Parameter ΔV Dropout V -V MULTpk ΔV Line drop detection threshold VFF ΔV Line drop detection threshold VFF R Internal discharge resistor DISCH V Disable threshold DIS V Enable threshold EN Fixed-off-time modulator ...
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Typical electrical performance 4 Typical electrical performance Figure 3. IC consumption vs. V 100 10 1 Co=1nF f =70kHz 0.1 0.01 0.001 Vcc [V] Figure 5. V Zener voltage vs ...
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L4984 Figure 9. UVLO saturation vs 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -50 - (C) Figure 11. Inductor saturation threshold vs. Tj Figure 12. V 1.9 1.8 1.7 1.6 ...
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Typical electrical performance Figure 15. R discharge vs -50 - (C) Figure 17 dropout vs. Tj MULTpk VFF 2 ...
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L4984 Figure 20. Multiplier characteristics at V 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 0.1 0.2 0.3 0.4 0.5 0.6 VMULT (V) Figure 22. Multiplier gain vs. Tj Multiplier Gain vs. Tj 0.5 ...
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Application information 5 Application information 5.1 Theory of operation The L4984 implements conventional “peak” current mode control, where the on-time TON of the external power switch is determined by the peak inductor current reaching the programmed value. The off-time TOFF, ...
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L4984 Figure 26. Line-modulated fixed-off-time modulator: a) internal block diagram; b) key waveforms COMP I Timer TIMER C T With reference to the schematic and the relevant key waveforms in proportional to the instantaneous line voltage is achieved by charging ...
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Application information Along a line half-cycle, TOFF goes all the way from a minimum near the zero-crossing to a maximum on the sinusoid peak important to check that the off-time occurring on the peak of the voltage sinusoid ...
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L4984 compliance with conducted EMI emission regulations. The relative frequency change due to the output voltage ripple is: Equation 12 Figure 28. Line-modulated fixed-off-time-controlled boost PFC: current waveforms Vin = 88 Vac Vin = 264 Vac Vin = 230 Vac ...
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Application information Figure 29. Line-modulated fixed-off-time-controlled boost PFC: input current harmonic contents The waveform relevant to Vin = 264 V largest portion of the line cycle where boost inductor operates in discontinuous mode (DCM). However, its harmonic content, shown in ...
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L4984 6 Overvoltage protection (OVP) Normally, the voltage control loop keeps the output voltage Vout of the PFC pre-regulator close to its nominal value, set by the ratio of the resistors R1 and R2 of the output divider. A pin ...
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Feedback failure detection (FFD) 7 Feedback failure detection (FFD) The OVP function handles “normal” overvoltage conditions, i.e. those resulting from an abrupt load/line change or occurring at startup. If the overvoltage is generated by a feedback failure, for instance when ...
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L4984 8 Voltage feedforward The power stage gain of PFC pre-regulators varies with the square of the RMS input voltage. So does the crossover frequency fc of the overall open-loop gain because the gain has a single pole characteristic. This ...
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Voltage feedforward both surges and drops. A capacitor C ground, complete an internal peak-holding circuit that provides a DC voltage equal to the peak of the voltage applied on the MULT pin. In this way, in case of sudden line ...
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L4984 Figure 32. R ·C FF current R · function of 3rd harmonic distortion introduced in the input 0 0.01 0 Doc ID 023489 ...
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Soft-start 9 Soft-start To reduce inrush energy at startup or after an auto-restart protection tripping, the L4984 uses soft-start. Please refer to housekeeping functions The function is performed by internally pulling the voltage on the MULT pin towards an asymptotic ...
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L4984 10 Inductor saturation detection Boost inductor hard saturation may be a fatal event for a PFC pre-regulator: the current upslope becomes so large (50-100 times steeper, see sense propagation delay, the current may reach abnormally high values. The voltage ...
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THD optimizer circuit 11 THD optimizer circuit The L4984 is provided with a special circuit that reduces the conduction dead-angle occurring at the AC input current near the zero-crossings of the line voltage (crossover distortion). In this way the THD ...
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L4984 Figure 36. HD optimization: standard PFC controller Figure 35 shows the internal block diagram of the THD optimizer circuit. To take maximum benefit from the THD optimizer circuit, the high-frequency filter capacitor after the bridge rectifier should be minimized, ...
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Power management and housekeeping functions 12 Power management and housekeeping functions A communication line with the control IC of the cascaded DC-DC converter can be established via the disable function included in the PFC_OK pin (see failure detection (FFD) controller ...
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L4984 Table 6. Summary of L4984 idle states Condition Caused or revealed by IC behavior UVLO V CC Standby V PFC_OK AC brownout V VFF OVP V PFC_OK V PFC_OK Feedback AND failure V INV Low V COMP consumption Saturated ...
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ECOPACK 13 ECOPACK In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at ...
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L4984 Figure 38. SSO10 package dimensions Doc ID 023489 Rev 3 ECOPACK 8140761 rev. A 33/35 ...
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Revision history 14 Revision history Table 8. Document revision history Date 20-Aug-2012 12-Nov-2012 01-Feb-2013 34/35 Revision 1 Initial release. Document status promoted from preliminary data to production data. 2 Table 2: Absolute maximum ratings Updated characteristics . Table 4: Pin ...
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... L4984 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...