AT28C64B-15PU Atmel, AT28C64B-15PU Datasheet

IC EEPROM 64KBIT 150NS 28DIP

AT28C64B-15PU

Manufacturer Part Number
AT28C64B-15PU
Description
IC EEPROM 64KBIT 150NS 28DIP
Manufacturer
Atmel

Specifications of AT28C64B-15PU

Format - Memory
EEPROMs - Parallel
Memory Type
EEPROM
Memory Size
64K (8K x 8)
Speed
150ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.600", 15.24mm)
Organization
8 K x 8
Interface Type
Parallel
Access Time
150 ns
Output Enable Access Time
70 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Current
40 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
5 V
Capacitance, Input
4 pF
Capacitance, Output
8 pF
Current, Input, Leakage
10 μA
Current, Operating
40 mA
Current, Output, Leakage
10
Data Retention
10 yrs.
Density
64K
Package Type
PDIP
Power Dissipation
220 mW
Temperature, Operating
-40 to +85 °C
Time, Access
150 ns
Time, Address Hold
50
Voltage, Input, High
2 V
Voltage, Input, Low
0.8 V
Voltage, Output, High
2.4 V
Voltage, Output, Low
0.4 V
Voltage, Supply
5 V
Memory Configuration
8K X 8
Supply Voltage Range
4.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
28
Rohs Compliant
Yes
Operating Temperature Range
-40°C
Ic Interface Type
Parallel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Features
1. Description
The AT28C64B is a high-performance electrically-erasable and programmable read-
only memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits.
Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 150 ns with power dissipation of just 220 mW. When the device is
deselected, the CMOS standby current is less than 100 µA.
The AT28C64B is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to
64 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by DATA POLLING of I/O7. Once the end of a write cycle has been
detected, a new access for a read or write can begin.
Atmel’s AT28C64B has additional features to ensure high quality and manufacturabil-
ity. The device utilizes internal error correction for extended endurance and improved
data retention characteristics. An optional software data protection mechanism is
available to guard against inadvertent writes. The device also includes an extra
64 bytes of EEPROM for device identification or tracking.
Fast Read Access Time – 150 ns
Automatic Page Write Operation
Fast Write Cycle Times
Low Power Dissipation
Hardware and Software Data Protection
DATA Polling and Toggle Bit for End of Write Detection
High Reliability CMOS Technology
Single 5V ±10% Supply
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-wide Pinout
Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option Only
– Internal Address and Data Latches for 64 Bytes
– Page Write Cycle Time: 10 ms Maximum (Standard)
– 1 to 64-byte Page Write Operation
– 40 mA Active Current
– 100 µA CMOS Standby Current
– Endurance: 100,000 Cycles
– Data Retention: 10 Years
2 ms Maximum (Option – Ref. AT28HC64BF Datasheet)
64K (8K x 8)
Parallel
EEPROM with
Page Write and
Software Data
Protection
AT28C64B
0270L–PEEPR–2/09

Related parts for AT28C64B-15PU

AT28C64B-15PU Summary of contents

Page 1

... When the device is deselected, the CMOS standby current is less than 100 µA. The AT28C64B is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing bytes simultaneously ...

Page 2

... PDIP, 28-lead SOIC Top View A12 GND 14 15 AT28C64B 2 2.2 32-lead PLCC Top View Note: PLCC package pins 1 and 17 are Don’t Connect. 2.3 28-lead TSOP Top View OE VCC A11 A11 VCC OE NC A10 A12 CE A7 I/O7 A6 I/O6 A5 I/O5 A4 I/ ...

Page 3

... Read The AT28C64B is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high-impedance state when either high. This dual line control gives designers flexibility in preventing bus contention in their systems ...

Page 4

... It should be noted that even after SDP is enabled, the user may still perform a byte or page write to the AT28C64B by preceding the data to be writ- ten by the same 3-byte command sequence used to enable SDP. Once set, SDP remains active unless the disable command sequence is issued. Power transi- tions do not disable SDP, and SDP protects the AT28C64B during power-up and power-down conditions ...

Page 5

... Exposure to absolute maximum rating conditions for extended periods may affect + 0.6V device reliability CC Condition MHz OUT -400 µA OH AT28C64B WE I OUT High High Z V High Z IL Min Max Units 10 µA 10 µA 100 µ ...

Page 6

... This parameter is characterized and is not 100% tested. AT28C64B 6 (1)(2)(3)(4) ADDRESS VALID ACC HIGH after the address transition without impact on t ACC after the falling edge of CE without impact pF). L AT28C64B-15 Min Max 150 150 OUTPUT VALID . ACC after an address change CE ACC ...

Page 7

... Input Test Waveforms and Measurement Level 12. Output Test Load 13. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. 0270L–PEEPR–2/ < Max 6 12 AT28C64B Units Conditions OUT 7 ...

Page 8

... Chip Select Setup Time CS t Chip Select Hold Time CH t Write Pulse Width ( Data Setup Time Data, OE Hold Time DH OEH 15. AC Write Waveforms 15.1 WE Controlled OE ADDRESS CE WE DATA IN 15.2 CE Controlled OE ADDRESS WE CE DATA IN AT28C64B 8 t OES OES Min Max 100 ...

Page 9

... A6 through A12 must specify the same page address during each high to low transition of WE (or CE must be high only when WE and CE are both low. 18. Chip Erase Waveforms µs (min (min 12.0V ±0.5V H 0270L–PEEPR–2/09 (1)(2) t WPH VALID ADD t DS VALID DATA AT28C64B Min Max 100 150 50 t BLC Units µ ...

Page 10

... A6 - A12 DATA Notes through A12 must specify the same page address during each high to low transition of WE (or CE) after the software code has been entered must be high only when WE and CE are both low. AT28C64B 10 20. Software Data Protection Disable (2) Notes: t WPH ...

Page 11

... Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. 0270L–PEEPR–2/09 (1) See “AC Read Characteristics” on page 6. t OEH t OE (1) (1)(2)( OEH OEHP AT28C64B Min Typ Max Min Typ Max 10 10 150 Units ...

Page 12

... Normalized I Graphs CC AT28C64B 12 0270L–PEEPR–2/09 ...

Page 13

... Wide, Plastic Gull Wing Small Outline (SOIC) 28T 28-lead, Plastic Thin Small Outline Package (TSOP) 0270L–PEEPR–2/09 Ordering Code Package AT28C64B-15JU 32J AT28C64B-15SU 28S AT28C64B-15TU 28T AT28C64B-15PU 28P6 Package Type AT28C64B Operation Range Industrial (-40°C to 85°C) 13 ...

Page 14

... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT28C64B 14 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER E1 E ...

Page 15

... A1 0.381 – D 36.703 – E 15.240 – E1 13.462 – B 0.356 – B1 1.041 – L 3.048 – C 0.203 – eB 15.494 – e 2.540 TYP DRAWING NO. AT28C64B MAX NOTE 4.826 – 37.338 Note 2 15.875 13.970 Note 2 0.559 1.651 3.556 0.381 17.526 09/28/01 REV. 28P6 B 15 ...

Page 16

... SOIC Dimensions in Millimeters and (Inches). Controlling dimension: Millimeters. 2325 Orchard Parkway San Jose, CA 95131 R AT28C64B 16 0.51(0.020) 0.33(0.013) 7.60(0.2992) 7.40(0.2914) PIN 1 1.27(0.50) BSC TOP VIEW 18.10(0.7125) 17.70(0.6969) 0.30(0.0118) 0.10(0.0040) 0º ~ 8º 1.27(0.050) 0.40(0.016) TITLE 28S, 28-lead, 0.300" Body, Plastic Gull Wing Small Outline (SOIC) JEDEC Standard MS-013 10 ...

Page 17

... Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R 0270L–PEEPR–2/09 PIN SEATING PLANE A1 TITLE 28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline Package, Type I (TSOP) AT28C64B 0º ~ 5º GAGE PLANE COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – – ...

Page 18

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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