BR24L02F-WE2 Rohm Semiconductor, BR24L02F-WE2 Datasheet - Page 8

IC EEPROM 2KBIT 400KHZ 8SOP

BR24L02F-WE2

Manufacturer Part Number
BR24L02F-WE2
Description
IC EEPROM 2KBIT 400KHZ 8SOP
Manufacturer
Rohm Semiconductor
Datasheets

Specifications of BR24L02F-WE2

Memory Size
2K (256 x 8)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOP
Clock Frequency
400kHz
Supply Voltage Range
1.8V To 5.5V
Memory Case Style
SOP
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Svhc
No SVHC (18-Jun-2010)
Package /
RoHS Compliant
Organization
256 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.1 MHz
Access Time
3500 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
2 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
1.8 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
BR24L02F-WE2TR

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Manufacturer
Quantity
Price
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The above numbers are maximum bytes for respective types. Any bytes
below these can be written.
Notes on write cycle continuous input
Notes on page write cycle
Write protect terminal (WP)
List of numbers of page write
In the case of BR24L02-W, 1 page = 8 bytes, but the page write cycle write time is 5ms at
maximum for 8byte bulk write.
It does not stand 5ms at maximum x 8 bytes = 40ms (Max.).
When WP terminal is set Vcc (H level), data rewrite of all addresses is prohibited. When it is set GND (L level), data rewrite of all
addresses is enabled. Be sure to connect this terminal to Vcc or GND, or control it to H level or L level. Do not use it open.
At extremely low voltage at power ON/OFF, by setting the WP terminal "H", mistake write can be prevented.
During tWR, set the WP terminal always to "L". If it is set "H", write is forcibly terminated.
Write protect function (WP)
Number of
Product
number
pages
LINE
SDA
S
T
A
R
T
1 0
BR24L01A-W
BR24L02-W
ADDRESS
1
SLAVE
8 Byte
0
Note)
Note)
A2
A1
A0
W
W
R
T
E
R
I
/
A
C
K
*1
WA
7
Note)
ADDRESS (n)
WORD
BR24L04-W
BR24L08-W
BR24L16-W
16 Byte
1
Fig.42 Difference of each type of slave address
WA
0
0
A
C
K
D7
1 0 1 0
Fig.42 スレイブアドレスの各機種の違い
1
DATA (n)
Fig.41 Page write cycle
0
BR24L32-W
BR24L64-W
32 Byte
A2
D0
1
8/16
A2A1A0
C
A
K
* 1 * 2 * 3
*1 BR24L01A-W becomes Don't Care.
*2 BR24L04W-W, BR24L08-W, and BR24L16-W become (n + 15).
*3 BR24L32-W and BR24L64-W become (n + 31).
A1
DATA (n+7)
*3
A0
For example, when it is started from address 06h,
therefore, increment is made as below,
06h → 07h → 00h → 01h ---, which please note.
* 06h --- 06 in hexadecimal, therefore, 00000110 becomes a binary
*2
*3
06h
number.
D0
Internal address increment
Page write mode (in the case of BR24L02-W)
A
C
K
O
S
T
P
At STOP (stop bit),
write starts.
WA7
0
0
0
0
0
0
*1 In BR24L16-W, A2 becomes P2.
*2 In BR24L08-W, BR24L16-W, A1 becomes P1.
*3 In BR24L04-W, A0 becomes PS, and in BR24L08-W
and BR24L16-W, A0 becomes P0.
tWR (maximum : 5ms)
Command is not accepted for this period.
Significant bit is fixed.
No digit up
Next command
1 0 1 0
WA4
0
0
0
0
0
0
WA3
0
0
0
0
0
0
WA2
0
0
0
1
1
0
WA1 WA0
0
0
1
1
1
0
0
1
0
0
1
0
Increment

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