70V25L25PFI IDT, 70V25L25PFI Datasheet
70V25L25PFI
Specifications of 70V25L25PFI
Related parts for 70V25L25PFI
70V25L25PFI Summary of contents
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... Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port LVTTL-compatible, single 3.3V (±0.3V) power supply Available in a 100-pin TQFP (IDT70V35/24) & (IDT70V25/24), 86-pin PGA (IDT70V25/24) and 84-pin PLCC (IDT70V25/24) Industrial temperature range (-40°C to +85°C) is available for selected speeds ...
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... Fabricated using IDT’s CMOS high-performance technology, these devices typically operate on only 430mW (IDT70V35/34) and 400mW (IDT70V25/24) of power. The IDT70V35/34 (IDT70V25/24) is packaged in a plastic 100-pin Thin Quad Flatpack. The IDT70V25/24 is packaged in a ceramic 84-pin PGA and 84-Pin PLCC. IDT70V35/34PF (5) PN100-1 ...
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... N/C 23 N NOTES for IDT70V24 All V pins must be connected to power supply All V pins must be connected to ground PN100-1 package body is approximately 14mm x 14mm x 1.4mm. 5. This package code is used to reference the package diagram. ...
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... I/O I/O I/O 8R 11R A B Index NOTES for IDT70V24 All V pins must be connected to power supply All V pins must be connected to ground supply G84-3 package body is approximately 1. 1. .16 in. 5. This package code is used to reference the package diagram. 6. This text does not indicate orientation of the actual part marking. ...
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... I I NOTES for IDT70V24 All V pins must be connected to power supply All V pins must be connected to ground J84-1 package body is approximately 1. 1. .17 in. 5. This package code is used to reference the package diagram. ...
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... Names (3) NOTES: ( for IDT70V34 and for IDT70V24 I I Upper Byte Select controls pins 9-17 for IDT70V35/34 and controls pins 8-15 for IDT70V25/24. 4. Lower Byte Select controls pins 0-8 for IDT70V35/34 and controls pins 0-7 for IDT70V25/24. 5624 tbl 01 Outputs LB SEM (3) I/O I/O 9-17 0 ...
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... Recommended DC Operating 5624 tbl 04 Conditions Symbol > 0.3V. TERM NOTES: Max. Unit 1. V > -1.5V for pulse width less than 10ns TERM OUT 5624 tbl 07 (V Test Conditions V = 3.6V ...
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... IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V35/34 Symbol Parameter Dynamic Operating , Outputs Disabled DD IL SEM = V Current IH (3) (Both Ports Active MAX CE and CE I Standby Current SB1 ...
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... IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V25/24 Symbol Parameter Dynamic Operating , Outputs Open DD IL SEM = V Current IH (3) (Both Ports Active MAX CE and CE I Standby Current SB1 ...
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... IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V35/34 Symbol Parameter READ CYCLE t Read Cycle Time RC t Address Access Time AA (3) t Chip Enable Access Time ACE (3) t Byte Enable Access Time ...
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... IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V25/24 Symbol Parameter READ CYCLE t Read Cycle Time RC t Address Access Time AA (3) t Chip Enable Access Time ACE (3) t Byte Enable Access Time ...
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... Symbol WRITE CYCLE t Write Cycle Time WC (3) t Chip Enable to End-of-Write EW t Address Valid to End-of-Write AW (3) t Address Set-up Time AS t Write Pulse Width WP t Write Recovery Time WR t Data Valid to End-of-Write DW (1,2) t Output High-Z Time HZ (4) t Data Hold Time DH t ...
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... Symbol WRITE CYCLE t Write Cycle Time WC (3) t Chip Enable to End-of-Write EW t Address Valid to End-of-Write AW (3) t Address Set-up Time AS t Write Pulse Width WP t Write Recovery Time WR t Data Valid to End-of-Write DW (1,2) t Output High-Z Time HZ (4) t Data Hold Time DH t ...
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... This parameter is guaranteed by device characterization, but is not production tested. Transition is measured 0mV from steady state with Output Test Load (Figure 2 LOW during R/W controlled write cycle, the write pulse width must be the larger HIGH during an R/W controlled write cycle, this requirement does not apply and the write pulse can be as short as ...
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... EW t SOP t DW DATA IN VALID SWRD Write Cycle Read Cycle -I/O for IDT70V35/34) and (I/O -I/O for IDT70V25/24) equal to the semaphore value 0"A" 2"A" MATCH R/W "A" SEM "A" t SPS -A 0"B" 2"B" MATCH R/W "B" ...
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... IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V35/34 Symbol BUSY TIMING (M BUSY Access Time from Address Match t BAA BUSY Disable Time from Address Not Matched t BDA BUSY Access Time from Chip Enable LOW ...
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... IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V25/24 Symbol Parameter BUSY TIMING (M BUSY Access Time from Address Match t BAA BUSY Disable Time from Address Not Matched t BDA BUSY Access Time from Chip Enable LOW ...
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... IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Timing Waveform of Write with BUSY R/W "A" BUSY "B" R/W "B" NOTES: must be met for both master BUSY input (slave) and output (master BUSY is asserted on port "B" blocking R only for the slave version. ...
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... IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V35/34 Symbol Parameter INTERRUPT TIMING t Address Set-up Time AS t Write Recovery Time WR t Interrupt Set Time INS t Interrupt Reset Time INR AC Electrical Characteristics Over the Operating ...
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... IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Waveform of Interrupt Timing ADDR "A" ( "A" R/W "A" INT "B" ADDR "B" "B" OE "B" INT "B" NOTES: 1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from “A”. ...
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... Right Port Writes "1" to Semaphore Left Port Writes "0" to Semaphore Left Port Writes "1" to Semaphore NOTES: 1. This table denotes a sequence of events for only one of the eight semaphores on the IDT70V35/34 (IDT70V25/24). 2. There are eight semaphore flags written to via I/O are addressed ...
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... High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM BUSY L Figure 3. Busy and chip enable routing for both width and depth expansion with IDT70V35/34 (IDT70V25/24) SRAMs. Functional Description The IDT70V35/34 (IDT70V25/24) provides two ports with separate control, address and I/O pins that permit independent access for reads or writes to any location in memory ...
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... Systems which can best use the IDT70V35/34 (IDT70V25/24) contain multiple processors or controllers and are typically very high-speed systems which are software controlled or software intensive. These systems can benefit from a performance increase offered by the IDT70V35/ 34 (IDT70V25/24)'s hardware semaphores, which provide a lockout mechanism without requiring complex programming. ...
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... Using Semaphores—Some Examples Perhaps the simplest application of semaphores is their application as resource markers for the IDT70V35/34 (IDT70V25/24)’s Dual-Port SRAM. Say the SRAM was to be divided into two blocks which were to be dedicated at any one time to servicing either the left or right port ...
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... Page 25 Removed "IDT" from orderable part number CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 The IDT logo is a registered trademark of Integrated Device Technology, Inc. The IDT logo is a registered trademark of Integrated Device Technology, Inc Process/ Temperature Range Blank Commercial (0° ...