71V35761S183PFGI IDT, 71V35761S183PFGI Datasheet - Page 19

• Manufacturer Part Number: 71V35761S183PFGI
• Description: SRAM 128Kx36 SYNC 3.3V PIPELINED BURST SRAM
• Manufacturer: IDT

Specifications of 71V35761S183PFGI

• Rohs: yes
• Memory Size: 128 KB
• Organization: 128 K x 36
• Access Time: 3.3 ns
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Maximum Operating Current: 350 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-100
• Memory Type: Synchronous
• Part # Aliases: IDT71V35761S183PFGI

Available JTAG Instructions
JTAG Identification Register Definitions (SA Version only)
NOTES:
1. Device outputs = All device outputs except TDO.
2. Device inputs = All device inputs except TDI, TMS, and TRST.
Revision Number (31:28)
IDT Device ID (27:12)
IDT JEDEC ID (11:1)
ID Register Indicator Bit (Bit 0)
EXTEST
SAMPLE/PRELOAD
DEVICE_ID
HIGHZ
RESERVED
RESERVED
RESERVED
RESERVED
CLAMP
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
BYPASS
VALIDATE
IDT71V35761, 128K x 36, 3.3V Synchronous SRAMs with
3.3V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect
Instruction Field
Instruction
Forces contents of the boundary scan cells onto the device outputs
Places the boundary scan register (BSR) between TDI and TDO.
Places the boundary scan register (BSR) between TDI and TDO.
SAMPLE allows data from device inputs
in the boundary scan cells and shifted serially through TDO. PRELOAD
allows data to be input serially into the boundary scan cells via the TDI.
Loads the JTAG ID register (JIDR) with the vendor ID code and places
the register between TDI and TDO.
Places the bypass register (BYR) between TDI and TDO. Forces all
device o utput drivers to a High-Z state.
Several combinations are reserved. Do not use codes other than those
identified for EXTEST, SAMPLE/PRELOAD, DEVICE_ID, HIGHZ, CLAMP,
VALIDATE and BYPASS instructions.
Uses BYR. Forces contents of the boundary scan cells onto the device
outputs. Places the byp ass registe r (BYR) between TDI and TDO.
Same as above.
Automatically loaded into the instruction register whenever the TAP
controller passes through the CAPTURE-IR state. The lower two bits '01'
are mand ated by the IEEE std. 1149.1 specification.
Same as above.
The BYPASS instruction is used to truncate the boundary scan register
as a single bit in length.
0x23C, 0x23E
Value
0x33
0x2
1
6.42
19
Reserved for version number.
Defines IDT part number 71V35761SA and 71V35781SA, respectively.
Indicates the presence of an ID register.
Allows unique identification of device vendor as IDT.
Description
(2)
and outputs
Commercial and Industrial Temperature Ranges
(1)
to be captured
Description
(1)
.
OPCODE
0000
0010
0100
0001
0011
0101
0110
1000
1001
1010
1100
1110
0111
1011
1101
1111
I5301 tbl 02
I5301 tbl 04