71V3576S133PFGI IDT, 71V3576S133PFGI Datasheet - Page 9

• Manufacturer Part Number: 71V3576S133PFGI
• Description: SRAM
• Manufacturer: IDT
• Series: IDT71V3576Sr
• Type: SRAMr

Specifications of 71V3576S133PFGI

• Rohs: yes
• Organization: 128 K x 36
• Access Time: 4.2 ns
• Supply Voltage - Max: 3.465 V
• Supply Voltage - Min: 3.135 V
• Maximum Operating Current: 260 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Package / Case: TQFP-100
• Maximum Clock Frequency: 133 MHz
• Memory Type: Synchronous
• Part # Aliases: IDT71V3576S133PFGI

Synchronous Write Function Truth Table
NOTES:
1. L = V
2. BW
3. Multiple bytes may be selected during the same cycle.
Asynchronous Truth Table
NOTES:
1. L = V
2. Synchronous function pins must be biased appropriately to satisfy operation requirements.
Interleaved Burst Sequence Table (LBO=V
NOTE:
1. Upon completion of the Burst sequence the counter wraps around to its initial state.
Linear Burst Sequence Table (LBO=V
NOTE:
1. Upon completion of the Burst sequence the counter wraps around to its initial state.
First Address
Second Address
Fourth Address
First Address
Second Address
Fourth Address
Third Address
Third Address
IDT71V3576, IDT71V3578, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with
3.3V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect
3
and BW
IL
IL
Write all Bytes
Write all Bytes
Write Byte 1
Write Byte 2
Write Byte 3
Write Byte 4
, H = V
, H = V
Operation
Read
Read
4
(1)
(1)
are not applicable for the IDT71V3578.
IH
IH
Sleep Mode
Operation
Deselected
, X = Don’t Care.
, X = Don’t Care.
Read
Read
Write
(3)
(3)
(3)
(3)
(2)
GW
H
H
L
H
H
H
H
H
OE
(1)
H
X
X
X
L
A1
A1
0
0
0
0
1
1
1
1
Sequence 1
Sequence 1
BWE
X
H
L
L
L
L
L
L
A0
A0
0
0
0
0
1
1
1
1
ZZ
6.42
L
L
L
L
H
9
SS
BW
)
X
X
H
L
L
H
H
H
A1
A1
0
0
0
0
1
1
1
1
1
Sequence 2
Sequence 2
(1, 2)
DD
)
A0
A0
0
0
0
0
1
1
1
1
Commercial and Industrial Temperature Ranges
BW
High-Z – Data In
X
X
H
L
H
L
H
H
I/O Status
2
Data Out
High-Z
High-Z
High-Z
A1
A1
0
0
0
0
1
1
1
1
Sequence 3
Sequence 3
A0
A0
BW
0
0
0
0
1
1
1
1
X
X
H
L
H
H
L
H
3
A1
A1
0
0
0
0
1
1
1
1
Sequence 4
Sequence 4
Standby
Power
Active
Active
Active
Sleep
BW
X
X
H
L
H
H
H
L
4
5279 tbl 12
5279 tbl 13
5279 tbl 14
5279 tbl 15
A0
A0
0
0
0
0
1
1
1
1