71V3558S200PFG IDT, 71V3558S200PFG Datasheet - Page 11

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71V3558S200PFG

Manufacturer Part Number
71V3558S200PFG
Description
SRAM
Manufacturer
IDT
Datasheet

Specifications of 71V3558S200PFG

Product Category
SRAM
Rohs
yes
Part # Aliases
IDT71V3558S200PFG
Device Operation - Showing Mixed Load, Burst,
Deselect and NOOP Cycles
Read Operation
NOTES:
1. H = High; L = Low; X = Don’t Care; Z = High Impedance.
2. CE = L is defined as CE
NOTES:
1. CE = L is defined as CE
2. H = High; L = Low; X = Don’t Care; Z = High Impedance.
IDT71V3556, IDT71V3558, 128K x 36, 256K x 18, 3.3V Synchronous SRAMS with
ZBT™ ™ ™ ™ ™ Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs
Cycle
Cycle
n+10
n+12
n+13
n+14
n+15
n+16
n+17
n+18
n+19
n+11
n+2
n+3
n+4
n+5
n+6
n+7
n+8
n+9
n+2
n+1
n+1
n
n
Address
Address
A
A
A
A
A
A
A
A
A
A
A
X
X
X
X
X
X
X
X
X
X
X
X
0
2
3
4
5
6
7
8
9
0
1
1
1
= L, CE
= L, CE
R/W
R/W
X
X
X
X
X
X
X
X
X
X
X
X
H
H
H
L
L
L
H
L
H
L
H
2
2
= L and CE
= L and CE
(1)
ADV/LD
ADV/LD
X
X
L
H
L
L
H
L
H
L
L
H
L
L
H
L
L
L
H
L
H
L
L
2
2
= H. CE = H is defined as CE
= H. CE = H is defined as CE
CE
CE
L
X
L
H
X
L
X
H
L
X
L
H
X
L
L
L
X
L
X
L
L
X
X
(1)
(2)
(2)
CEN
CEN
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
1
1
BWx
BWx
= H, CE
= H, CE
6.42
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
11
2
2
= H or CE
= H or CE
OE
OE
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
L
L
L
L
L
L
L
L
2
2
= L.
= L.
Q
Q
D
D
I/O
I/O
Q
Q
D
D
D
Q
D
Q
Q
Q
X
X
X
X
Z
Z
Z
Z
Z
3+1
7+1
0+1
2+1
0
2
3
4
5
6
7
8
0
1
Commercial and Industrial Temperature Ranges
Comments
Load read
Burst read
Load read
Deselect or STOP
NOOP
Load read
Burst read
Deselect or STOP
Load write
Burst write
Load write
Deselect or STOP
NOOP
Load write
Load read
Load write
Burst write
Load read
Burst read
Load write
Comments
Clock Setup Valid
Contents of Address A
Address and Control meet setup
0
Read Out
5281 tbl 12
5281 tbl 13

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