71V3558S200PFG

Manufacturer Part Number71V3558S200PFG
DescriptionSRAM
ManufacturerIDT
71V3558S200PFG datasheet
 


Specifications of 71V3558S200PFG

Product CategorySRAMRohsyes
Part # AliasesIDT71V3558S200PFG  
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IDT71V3556, IDT71V3558, 128K x 36, 256K x 18, 3.3V Synchronous SRAMS with
ZBT™ ™ ™ ™ ™ Feature, 3.3V I/O, Burst Counter, and Pipelined Outputs
AC Electrical Characteristics
(V
= 3.3V +/-5%, Commercial and Industrial Temperature Ranges)
DD
Symbol
Parameter
t
Clock Cycle Time
CYC
(1)
Clock Frequence
t
F
(2)
Clock High Pulse Width
t
CH
(2)
Clock Low Pulse Width
t
CL
Output Parameters
t
Clock High to Valid Data
CD
t
Clock High to Data Change
CDC
(3,4,5)
Clock High to Output Active
t
CLZ
(3,4,5)
Clo ck High to Data High-Z
t
CHZ
t
Output Enable Access Time
OE
(3,4)
Output Enable Low to Data Active
t
OLZ
(3,4)
Output Enable High to Data High-Z
t
OHZ
Set Up Times
t
Clock Enable Setup Time
SE
t
Address Setup Time
SA
t
Data In Setup Time
SD
t
Read/Write (R/W) Setup Time
SW
t
Advance/Load (ADV/LD) Setup Time
SADV
t
Chip Enable/Select Setup Time
SC
t
Byte Write Enable (BWx) Setup Time
SB
Hold Times
t
Clock Enable Hold Time
HE
t
Address Hold Time
HA
t
Data In Hold Time
HD
t
Read/Write (R/W) Hold Time
HW
t
Advance/Load (ADV/LD) Hold Time
HADV
t
Chip Enable/Select Hold Time
HC
t
Byte Write Enable (BWx) Hold Time
HB
NOTES:
1. t
= 1/t
.
F
CYC
2. Measured as HIGH above 0.6V
and LOW below 0.4V
DDQ
3. Transition is measured ±200mV from steady-state.
4. These parameters are guaranteed with the AC load (Figure 1) by device characterization. They are not production tested.
5. To avoid bus contention, the output buffers are designed such that t
specs as shown do not imply bus contention because t
Max. parameter (worse case at 70 deg. C, 3.135V).
6. Commercial temperature range only. Only available in 256K x 18 configuration.
Commercial and Industrial Temperature Ranges
166MHz
(6)
200MHz
Min.
Max.
Min.
Max.
5
6
____
____
200
166
____
____
1.8
____
1.8
____
1.8
1.8
____
____
3.2
3.5
____
____
1
1
____
____
1
1
____
____
1
3
1
3
3.2
3.5
____
____
0
0
____
____
____
3.5
____
3.5
1.5
1.5
____
____
1.5
1.5
____
____
1.5
____
1.5
____
1.5
1.5
____
____
1.5
1.5
____
____
1.5
1.5
____
____
1.5
____
1.5
____
0.5
0.5
____
____
0.5
0.5
____
____
0.5
0.5
____
____
0.5
0.5
____
____
0.5
0.5
____
____
0.5
0.5
____
____
0.5
____
0.5
____
.
DDQ
(device turn-off) is about 1ns faster than t
CHZ
is a Min. parameter that is worse case at totally different test conditions (0 deg. C, 3.465V) than t
CLZ
16
6.42
133MHz
100MHz
Min.
Max.
Min.
Max.
7.5
10
____
____
133
100
____
____
2.2
____
3.2
____
2.2
3.2
____
____
4.2
5
____
____
1
1
____
____
1
1
____
____
1
3
1
3.3
4.2
5
____
____
0
0
____
____
____
4.2
____
5
1.7
2.0
____
____
1.7
2.0
____
____
1.7
____
2.0
____
1.7
2.0
____
____
1.7
2.0
____
____
1.7
2.0
____
____
1.7
____
2.0
____
0.5
0.5
____
____
0.5
0.5
____
____
0.5
0.5
____
____
0.5
0.5
____
____
0.5
0.5
____
____
0.5
0.5
____
____
0.5
____
0.5
____
5281 tbl 24
(device turn-on) at a given temperature and voltage. The
CLZ
which is a
,
CHZ
Unit
ns
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns