71V3577S80BQ IDT, 71V3577S80BQ Datasheet
71V3577S80BQ
Specifications of 71V3577S80BQ
Related parts for 71V3577S80BQ
71V3577S80BQ Summary of contents
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... The burst mode feature offers the highest level of performance to the system designer, as the IDT71V3577/79 can provide four cycles of data for a single address presented to the SRAM. An internal burst address counter accepts the first cycle address from the processor, initiating the access sequence ...
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... LOW be left floating. This pin has an internal pullup. Only available in BGA package. Asynchronous sleep mode input. ZZ HIGH will gate the CLK internally and power down the IDT71V3577/79 to HIGH its lowest power consumption level. Data retention is guaranteed in Sleep Mode.This pin has an internal pull down ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Functional Block Diagram LBO ADV CLK ADSC ADSP 16/17 GW BWE Powerdown OE 36/18 I I TMS TDI TCK TRST ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Absolute Maximum Ratings Symbol Rating (2) V Terminal Voltage with TERM Respect to GND (3,6) V Terminal Voltage with TERM Respect to GND (4,6) V Terminal Voltage with TERM Respect to GND (5,6) V Terminal Voltage with ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Pin Configuration – 128K x 36 100 DDQ I I DDQ ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Pin Configuration – 256K x 18 100 DDQ I DDQ ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Pin Configuration – 128K x 36, 119 BGA DDQ I I DDQ DDQ I I DDQ N I ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Pin Configuration – 128K x 36, 165 fBGA ( I DDQ D I/O I DDQ E I/O I DDQ F I/O I ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range Symbol Parameter |I | Input Leakage Current LBO and JTAG Input Leakage Current | Output Leakage Current ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Synchronous Truth Table Operation Address Used Deselected Cycle, Power Down None Deselected Cycle, Power Down None Deselected Cycle, Power Down None Deselected Cycle, Power Down ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Synchronous Write Function Truth Table GW Operation Read Read Write all Bytes Write all Bytes (3) Write Byte 1 (3) Write Byte 2 (3) Write Byte 3 (3) Write Byte 4 NOTES: 1 ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect AC Electrical Characteristics (V = 3.3V ±5%, Commercial and Industrial Temperature Ranges) DD Symbol Clock Parameter t Clock Cycle Time CYC (1) Clock High Pulse Width t CH (1) Clock Low Pulse Width t CL ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Timing Waveform of Flow-Through Read Cycle Commercial and Industrial Temperature Ranges (1,2) , 6.42 13 ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Timing Waveform of Combined Flow-Through Read and Write Cycles Commercial and Industrial Temperature Ranges 6.42 14 (1,2,3) , ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Timing Waveform of Write Cycle No Controlled Commercial and Industrial Temperature Ranges (1,2,3) 6. ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Timing Waveform of Write Cycle No Byte Controlled Commercial and Industrial Temperature Ranges 6.42 16 (1,2,3) , ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Timing Waveform of Sleep (ZZ) and Power-Down Modes Commercial and Industrial Temperature Ranges , 6.42 17 (1,2,3) ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Non-Burst Read Cycle Timing Waveform CLK ADSP ADSC ADDRESS GW, BWE, BWx CE DATA OUT NOTES input is LOW, ADV is HIGH and LBO is Don't Care for this cycle. ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect JTAG Interface Specification (SA Version only JCL TCK (1) Device Inputs / TDI/TMS (2) Device Outputs / TDO t JRSR ( 3) TRST t JRST NOTES: 1. Device inputs = All device inputs except TDI, TMS and TRST. ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect JTAG Identification Register Definitions (SA Version only) Instruction Field Revision Number (31:28) IDT Device ID (27:12) IDT JEDEC ID (11:1) ID Register Indicator Bit (Bit 0) Available JTAG Instructions Instruction EXTEST SAMPLE/PRELOAD ...
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... IDT71V3577S_79S, IDT71V3577SA_79SA, 128K x 36, 256K x 18, 3.3V Synchronous SRAMs with 3.3V I/O, Flow-Through Outputs, Burst Counter, Single Cycle Deselect Ordering Information XXX Power Speed Package Device Type Package Information 100 Pin Thin Quad Plastic Flatpack (TQFP) 119 Ball Grid Array (BGA) 165 Fine Pitch Ball Grid Array (fBGA) ...
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... CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 The IDT logo is a registered trademark of Integrated Device Technology, Inc. Released Y generation die step datasheet Added green (Restricted hazardous substance device) to the datasheet. Added Industrial temp range values to the 7.5ns speed in the DC chars table Removed die step indicator from the ordering information ...