MT45W1MW16BDGB-708 AT TR Micron Technology Inc, MT45W1MW16BDGB-708 AT TR Datasheet - Page 19

IC PSRAM 16MBIT 70NS 54VFBGA

MT45W1MW16BDGB-708 AT TR

Manufacturer Part Number
MT45W1MW16BDGB-708 AT TR
Description
IC PSRAM 16MBIT 70NS 54VFBGA
Manufacturer
Micron Technology Inc

Specifications of MT45W1MW16BDGB-708 AT TR

Format - Memory
RAM
Memory Type
PSRAM (Page)
Memory Size
16M (1M x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
-30°C ~ 85°C
Package / Case
54-VFBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1419-2
Configuration Registers
Access Using CRE
Figure 13:
PDF: 09005aef81cb58ed/Source: 09005aef81c7a667
16mb_burst_cr1_0_p23z_2.fm - Rev. H 4/08 EN
DQ[15:0]
LB#/UB#
Configuration Register WRITE in Asynchronous Mode Followed by READ ARRAY
Operation
A[18:0]
ADV#
A19
WE#
OE#
CLK
CRE
CE#
1
Note:
Two user-accessible configuration registers define the device operation. The bus config-
uration register (BCR) defines how the CellularRAM interacts with the system memory bus
and is nearly identical to its counterpart on burst mode Flash devices. The refresh configu-
ration register (RCR) is used to control how refresh is performed on the DRAM array.
These registers are automatically loaded with default settings during power-up and can
be updated any time the devices are operating in a standby state.
The configuration registers are loaded using either a synchronous or an asynchronous
WRITE operation when the configuration register enable (CRE) input is HIGH (see
Figure 13 on page 19 and Figure 14 on page 20). When CRE is LOW, a READ or WRITE
operation will access the memory array. The register values are placed on address pins
A[19:0]. In an asynchronous WRITE, the values are latched into the configuration
register on the rising edge of ADV#, CE#, or WE#, whichever occurs first; LB# and UB#
are “Don’t Care.” Access using CRE is WRITE only. The BCR is accessed when A[19] is
HIGH; the RCR is accessed when A[19] is LOW.
t VPH
A[19] = LOW to load RCR; A[19] = HIGH to load BCR.
Select Control Register
16Mb: 1 Meg x 16 Async/Page/Burst CellularRAM 1.0 Memory
OPCODE
t AVS
t AVS
Initiate Control Register Access
t VP
t AVH
t AVH
t CW
19
Write Address Bus Value
to Control Register
t WP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t CPH
Configuration Registers
ADDRESS
ADDRESS
©2005 Micron Technology, Inc. All rights reserved.
DATA VALID
DON’T CARE

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