IS61LV5128AL-10TLI ISSI, Integrated Silicon Solution Inc, IS61LV5128AL-10TLI Datasheet
IS61LV5128AL-10TLI
Specifications of IS61LV5128AL-10TLI
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IS61LV5128AL-10TLI Summary of contents
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... CMOS input levels. The IS61LV5128AL operates from a single 3.3V power supply and all inputs are TTL-compatible. The IS61LV5128AL is available in 36-pin 400-mil SOJ, 36- pin mini BGA, and 44-pin TSOP (Type II) packages. 512K X 8 DECODER ...
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... IS61LV5128AL PIN CONFIGURATION 36 mini BGA I/ I/ GND I/O6 A18 A17 I/O7 A16 A9 A10 A12 H A11 PIN DESCRIPTIONS A0-A18 Address Inputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input I/O0-I/O7 Bidirectional Ports V Power DD GND Ground NC No Connection TRUTH TABLE Mode Not Selected ...
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... IS61LV5128AL ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Terminal Voltage with Respect to GND TERM T Storage Temperature STG P Power Dissipation T Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause perma- nent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...
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... IS61LV5128AL DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL V Input HIGH Voltage IH V Input LOW Voltage ( Input Leakage LI I Output Leakage LO Note –3.0V for pulse width less than 10 ns. IL POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions I V Dynamic Operating ...
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... IS61LV5128AL READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time AA t Output Hold Time OHA CE Access Time t ACE OE Access Time t DOE OE to High-Z Output t (2) HZOE OE to Low-Z Output t (2) LZOE CE to High-Z Output t (2 HZCE CE to Low-Z Output ...
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... IS61LV5128AL AC WAVEFORMS (1,2) (Address Controlled) ( READ CYCLE NO. 1 ADDRESS D OUT PREVIOUS DATA VALID READ CYCLE NO. 2 (1,3) (CE and OE Controlled) ADDRESS LZCE HIGH-Z D OUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE Address is valid prior to or coincident with CE LOW transitions OHA ...
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... IS61LV5128AL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End t SCE t Address Setup Time AW to Write End t Address Hold from Write End HA t Address Setup Time SA WE Pulse Width t 1 PWE WE Pulse Width (OE = LOW PWE t Data Setup to Write End ...
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... IS61LV5128AL (1,2) (WE Controlled HIGH During Write Cycle) WRITE CYCLE NO. 2 ADDRESS OE CE LOW DATA UNDEFINED OUT D IN Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced to the rising or falling edge of the signal that terminates the Write. 2. I/O will assume the High-Z state if OE > ...
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... IS61LV5128AL-10T 12 IS61LV5128AL-12K 12 IS61LV5128AL-12T Industrial Range: –40°C to +85°C Speed (ns) Order Part No. 10 IS61LV5128AL-10KI 10 IS61LV5128AL-10KLI 10 IS61LV5128AL-10TI 10 IS61LV5128AL-10TLI 10 IS61LV5128AL-10BI 10 IS61LV5128AL-10BLI 12 IS61LV5128AL-12TI Integrated Silicon Solution, Inc. — www.issi.com — Rev. C 04/15/05 Package 400-mil Plastic SOJ TSOP (Type II) 400-mil Plastic SOJ TSOP (Type II) ...
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PACKAGING INFORMATION Mini Ball Grid Array Package Code: B (36-pin) Top View SEATING PLANE mBGA - 6mm x 8mm MILLIMETERS Sym. Min. Typ. Max. Min. Typ. ...
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PACKAGING INFORMATION 400-mil Plastic SOJ Package Code Millimeters Inches Symbol Min Max Min No. Leads ( 3.25 3.75 0.128 0.148 A1 0.64 — 0.025 A2 2.08 — 0.082 B 0.38 0.51 0.015 0.020 ...
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PACKAGING INFORMATION Millimeters Inches Symbol Min Max Min No. Leads ( 3.25 3.75 0.128 0.148 A1 0.64 — 0.025 A2 2.08 — 0.082 B 0.38 0.51 0.015 0.020 b 0.66 0.81 0.026 0.032 C 0.18 0.33 0.007 0.013 ...
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PACKAGING INFORMATION Plastic TSOP Package Code: T (Type II Millimeters Inches Symbol Min Max Min Ref. Std. No. Leads ( — 1.20 — A1 0.05 0.15 0.002 0.006 b 0.30 0.52 0.012 ...