6116SA25TDB IDT, 6116SA25TDB Datasheet

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6116SA25TDB

Manufacturer Part Number
6116SA25TDB
Description
SRAM 16K Asynch. 2Kx8 HS, L-Pwr, SRAM
Manufacturer
IDT
Datasheet

Specifications of 6116SA25TDB

Part # Aliases
IDT6116SA25TDB

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Part Number
Manufacturer
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Part Number:
6116SA25TDB
Manufacturer:
IDT
Quantity:
5
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Features
Functional Block Diagram
©2011 Integrated Device Technology, Inc.
I/O
I/O
A
A
WE
CS
OE
High-speed access and chip select times
– Military: 20/25/35/45/55/70/90/120/150ns (max.)
– Industrial: 20/25ns (max.)
– Commercial: 15/20/25ns (max.)
Low-power consumption
Battery backup operation
– 2V data retention voltage (LA version only)
Produced with advanced CMOS high-performance
technology
CMOS process virtually eliminates alpha particle soft-error
rates
Input and output directly TTL-compatible
Static operation: no clocks or refresh required
Available in ceramic 24-pin DIP, ceramic and plastic 24-pin Thin
Dip and 24-pin SOIC
Military product compliant to MIL-STD-833, Class B
10
0
0
7
CONTROL
CIRCUIT
DECODER
ADDRESS
CIRCUIT
INPUT
DATA
CMOS Static RAM
16K (2K x 8-Bit)
1
Description
organized as 2K x 8. It is fabricated using IDT's high-performance,
high-reliability CMOS technology.
reduced power standby mode. When CS goes HIGH, the circuit will
automatically go to, and remain in, a standby power mode, as long
as CS remains HIGH. This capability provides significant system level
power and cooling savings. The low-power (LA) version also offers a
battery backup data retention capability where the circuit typically
consumes only 1μW to 4μW operating off a 2V battery.
static asynchronous circuitry is used, requiring no clocks or refreshing
for operation.
mil plastic or ceramic DIP, 24-lead gull-wing SOIC providing high board-
level packing densities.
version of MIL-STD-883, Class B, making it ideally suited to military
temperature applications demanding the highest level of performance and
reliability.
The IDT6116SA/LA is a 16,384-bit high-speed static RAM
Access times as fast as 15ns are available. The circuit also offers a
All inputs and outputs of the IDT6116SA/LA are TTL-compatible. Fully
The IDT6116SA/LA is packaged in 24-pin ceramic 600 mil and 300
Military grade product is manufactured in compliance to the latest
I/O CONTROL
128 X 128
MEMORY
ARRAY
IDT6116SA
IDT6116LA
APRIL 2011
DSC-3089/07
3089 drw 01
V
GND
CC
,

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6116SA25TDB Summary of contents

Page 1

... Description The IDT6116SA/ 16,384-bit high-speed static RAM organized fabricated using IDT's high-performance, high-reliability CMOS technology. Access times as fast as 15ns are available. The circuit also offers a reduced power standby mode. When CS goes HIGH, the circuit will automatically go to, and remain in, a standby power mode, as long as CS remains HIGH ...

Page 2

... IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Pin Configurations P24 D24 D24 SO24 GND 12 DIP/SOIC Top View Pin Description Name I GND (1) Truth Table ...

Page 3

... GND Vcc 5.0V ± 10% GND 0V 5.0V ± 10 5.0V ± 10 3089 tbl 05 NOTES (min.) = –3.0V for pulse width less than 20ns, once per cycle must not exceed V IN Test Conditions V = Max., MIL GND to V COM' Max MIL ...

Page 4

... IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) DC Electrical Characteristics (V = 5.0V ± 10 0.2V < ...

Page 5

... IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Low V Data Retention Waveform 4.5V t CDR Test Conditions Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels AC Test Load DATA OUT 255Ω Figure 1. AC Test Load Military, Commercial, and Industrial Temperature Ranges DATA RETENTION MODE ≥ ...

Page 6

... IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) AC Electrical Characteristics ...

Page 7

... IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Timing Waveform of Read Cycle No. 1 ADDRESS OE CS DATA OUT Supply Currents I SB Timing Waveform of Read Cycle No. 2 ADDRESS DATA PREVIOUS DATA VALID OUT Timing Waveform of Read Cycle No DATA OUT NOTES HIGH for Read cycle. ...

Page 8

... IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) AC Electrical Characteristics ...

Page 9

... If the CS LOW transition occurs simultaneously with or after the WE LOW transition, the outputs remain in the high-impedance state. 6. Transition is measured ±500mV from steady state continuously HIGH LOW during a WE controlled write cycle, the write pulse width must be the larger turn off and data to be placed on the bus for the required t is the specified t ...

Page 10

... IDT6116SA/LA CMOS Static RAM 2K (16K x 8-Bit) Ordering Information — Military 6116 XX XXX Device Type Power Speed Ordering Information — Commercial & Industrial 6116 XX XXX X Device Type Power Speed Package Military, Commercial, and Industrial Temperature Ranges X X Package Process/ Temperature Range B TD ...

Page 11

... Pg.1,2,3,4,6,10 CORPORATE HEADQUARTERS 6024 Silver Creek Valley Road San Jose, CA 95138 The IDT logo is a registered trademark of Integrated Device Technology, Inc. Military, Commercial, and Industrial Temperature Ranges Updated to new format Added Industrial Temperature range offerings Separated ordering information into military, commercial, and industrial temperature range offerings ...

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