STM8S005C6T6 STMicroelectronics, STM8S005C6T6 Datasheet
STM8S005C6T6
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STM8S005C6T6 Summary of contents
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Value line, 16 MHz STM8S 8-bit MCU, 32 Kbytes Flash, data LQFP48 7x7 Features Core • 16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline • Extended instruction set Memories • Medium-density Flash/EEPROM: - Program memory: 32 Kbytes ...
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Contents Contents 1 Introduction ..............................................................................................................7 2 Description ...............................................................................................................8 3 Block diagram ..........................................................................................................9 4 Product overview ...................................................................................................10 4.1 Central processing unit STM8 .....................................................................................10 4.2 Single wire interface module (SWIM) and debug module (DM) ..................................10 4.3 Interrupt controller .......................................................................................................11 4.4 Flash program ...
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STM8S005K6 STM8S005C6 9.1.4 Typical current consumption ................................................................49 9.1.5 Loading capacitor .................................................................................50 9.1.6 Pin input voltage ...................................................................................50 9.2 Absolute maximum ratings ..........................................................................................50 9.3 Operating conditions ...................................................................................................52 9.3.1 VCAP external capacitor ......................................................................54 9.3.2 Supply current characteristics ..............................................................55 9.3.3 External clock sources and ...
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List of tables List of tables Table 1. STM8S005xx value line features ................................................................................................8 Table 2. Peripheral clock gating bit assignments in CLK_PCKENR1/2 registers ..................................13 Table 3. TIM timer features ...................................................................................................................15 Table 4. Legend/abbreviations for pinout tables ...................................................................................19 Table 5. Pin ...
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STM8S005K6 STM8S005C6 Table 48. ESD absolute maximum ratings .............................................................................................92 Table 49. Electrical sensitivities .............................................................................................................92 Table 50. 48-pin low profile quad flat package mechanical data ............................................................93 Table 51. 32-pin low profile quad flat package mechanical data .........................................................102 Table 52. Thermal characteristics ...
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List of figures List of figures Figure 1. STM8S005xx value line block diagram .....................................................................................9 Figure 2. Flash memory organization ....................................................................................................12 Figure 3. LQFP 48-pin pinout .................................................................................................................20 Figure 4. LQFP 32-pin pinout ................................................................................................................21 Figure 5. Memory map ...........................................................................................................................25 Figure 6. Supply ...
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STM8S005K6 STM8S005C6 1 Introduction This datasheet contains the description of the device features, pinout, electrical characteristics, mechanical data and ordering information. • For complete information on the STM8S microcontroller memory, registers and peripherals, please refer to the STM8S microcontroller family ...
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Description 2 Description The STM8S005xx value line 8-bit microcontrollers offer 32 Kbytes of Flash program memory, plus 128 bytes of data EEPROM. They are referred to as medium-density devices in the STM8S microcontroller family reference manual (RM0016). All devices of ...
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STM8S005K6 STM8S005C6 3 Block diagram Figure 1: STM8S005xx value line block diagram Reset POR/ PDR Single wire debug interf. Master/slave autosynchro LIN master SPI emul. 400 Kbit/s 8 Mbit channels 1/2/4 kHz beep Reset block Clock controller ...
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Product overview 4 Product overview The following section intends to give an overview of the basic features of the device functional modules and peripherals. For more detailed information please refer to the corresponding family reference manual (RM0016). 4.1 Central processing ...
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STM8S005K6 STM8S005C6 SWIM Single wire interface module for direct access to the debug module and memory programming. The interface can be activated in all device operation modes. The maximum data transmission speed is 145 bytes/ms. Debug module The non-intrusive debugging ...
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Product overview The UBC area remains write-protected during in-application programming. This means that the MASS keys do not unlock the UBC area. It protects the memory used to store the boot program, specific code libraries, reset and interrupt vectors, the ...
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STM8S005K6 STM8S005C6 - 16 MHz high-speed internal RC oscillator (HSI) - 128 kHz low-speed internal RC (LSI) • Startup clock: After reset, the microcontroller restarts by default with an internal 2 MHz clock (HSI/8). The prescaler ratio and clock source ...
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Product overview 4.7 Watchdog timers The watchdog system is based on two independent timers providing maximum security to the applications. Activation of the watchdog timers is controlled by option bytes or by software. Once activated, the watchdogs cannot be disabled ...
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STM8S005K6 STM8S005C6 4.10 TIM1 - 16-bit advanced control timer This is a high-end timer designed for a wide range of control applications. With its complementary outputs, dead-time control and center-aligned PWM capability, the field of applications is extended to motor ...
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Product overview Timer Counter Prescaler size (bits) TIM4 8 Any power of 2 from 1 to 128 4.13 Analog-to-digital converter (ADC1) The STM8S105xx products contain a 10-bit successive approximation A/D converter (ADC1) with multiplexed input channels and ...
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STM8S005K6 STM8S005C6 • LIN master mode • LIN slave mode Asynchronous communication (UART mode) • Full duplex communication - NRZ standard format (mark/space) • Programmable transmit and receive baud rates Mbit/s (f following any standard baud rate ...
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Product overview 4.14.3 I²C • I²C master features: - Clock generation - Start and stop generation • I²C slave features: - Programmable I2C address detection - Stop bit detection • Generation and detection of 7-bit/10-bit addressing and general call • ...
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STM8S005K6 STM8S005C6 5 Pinout and pin description Type Level Output speed Port and control configuration Reset state Table 4: Legend/abbreviations for pinout tables I= Input Output Power supply CM = CMOS Input Output HS = High ...
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Pinout and pin description 5.1 STM8S005 pinouts and pin description [TIM3_CH1] TIM2_CH3/PA3 1. (HS) high sink capability. 2. (T) True open drain (P-buffer and protection diode alternate function remapping option (If the same alternate function ...
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STM8S005K6 STM8S005C6 1. (HS) high sink capability alternate function remapping option (If the same alternate function is shown twice, it indicates an exclusive choice not a duplication of the function). Table 5: Pin description for STM8S005 microcontrollers ...
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Pinout and pin description Pin number Pin name Type LQFP48 LQFP32 6 5 VCAP DDIO_1 PA3/ TIM2 I/O _CH3 [TIM3 _CH1 PA4 I PA5 ...
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STM8S005K6 STM8S005C6 Pin number Pin name Type LQFP48 LQFP32 25 17 PE5/SPI_ I/O NSS 26 18 PC1/ I/O TIM1_ CH1/ UART2_CK 27 19 PC2/ I/O TIM1_ CH2 28 20 PC3/ I/O TIM1_ CH3 29 21 PC4/ I/O TIM1_ CH4 30 ...
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Pinout and pin description Pin number Pin name Type LQFP48 LQFP32 42 26 PD1/ I/O (4) SWIM 43 27 PD2/ I/O TIM3_ CH1 [TIM2_ CH3 PD3/ I/O TIM2_ CH2 [ADC_ ETR PD4/ I/O TIM2_ CH1 [BEEP] ...
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STM8S005K6 STM8S005C6 6 Memory and register map 6.1 Memory map The following table lists the boundary addresses for each memory size. The top of the stack is at the RAM end address in each case. Figure 5: Memory map 0x00 ...
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Memory and register map Table 6: Flash, Data EEPROM and RAM boundary addresses Memory area Flash program memory RAM Data EEPROM 6.2 Register map 6.2.1 I/O port hardware register map Address Block 0x00 5000 Port A 0x00 5001 0x00 5002 ...
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STM8S005K6 STM8S005C6 Address Block 0x00 500B 0x00 500C 0x00 500D 0x00 500E 0x00 500F Port D 0x00 5010 0x00 5011 0x00 5012 0x00 5013 0x00 5014 Port E 0x00 5015 0x00 5016 0x00 5017 0x00 5018 0x00 5019 Port F ...
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Memory and register map Address Block 0x00 501E Port G 0x00 501F 0x00 5020 0x00 5021 0x00 5022 0x00 5023 Port H 0x00 5024 0x00 5025 0x00 5026 0x00 5027 0x00 5028 Port I 0x00 5029 0x00 502A 0x00 502B ...
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STM8S005K6 STM8S005C6 6.2.2 General hardware register map Address Block Register label 0x00 5050 to Reserved area (10 bytes) 0x00 5059 0x00 505A Flash 0x00 505B 0x00 505C 0x00 505D 0x00 505E 0x00 505F 0x00 5060 to Reserved area (2 bytes) ...
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Memory and register map Address Block Register label 0x00 50B3 RST 0x00 50B4 to Reserved area (12 bytes) 0x00 50BF 0x00 50C0 CLK 0x00 50C1 0x00 50C2 Reserved area (1 byte) 0x00 50C3 CLK 0x00 50C4 0x00 50C5 0x00 50C6 ...
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STM8S005K6 STM8S005C6 Address Block Register label 0x00 50D3 to Reserved area (13 bytes) 0x00 50DF 0x00 50E0 IWDG 0x00 50E1 0x00 50E2 0x00 50E3 to Reserved area (13 bytes) 0x00 50EF 0x00 50F0 AWU 0x00 50F1 0x00 50F2 0x00 50F3 ...
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Memory and register map Address Block Register label 0x00 5208 to Reserved area (8 bytes) 0x00 520F 2 0x00 5210 I C 0x00 5211 0x00 5212 0x00 5213 0x00 5214 0x00 5215 0x00 5216 0x00 5217 0x00 5218 0x00 5219 ...
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STM8S005K6 STM8S005C6 Address Block Register label 0x00 5240 UART2 0x00 5241 0x00 5242 0x00 5243 0x00 5244 0x00 5245 0x00 5246 0x00 5247 0x00 5248 0x00 5249 0x00 524A 0x00 524B 0x00 524C to Reserved area (4 bytes) 0x00 524F ...
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Memory and register map Address Block Register label 0x00 5256 0x00 5257 0x00 5258 0x00 5259 0x00 525A 0x00 525B 0x00 525C 0x00 525D 0x00 525E 0x00 525F 0x00 5260 0x00 5261 0x00 5262 0x00 5263 0x00 5264 0x00 5265 ...
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STM8S005K6 STM8S005C6 Address Block Register label 0x00 5266 0x00 5267 0x00 5268 0x00 5269 0x00 526A 0x00 526B 0x00 526C 0x00 526D 0x00 526E 0x00 526F 0x00 5270 to Reserved area (147 bytes) 0x00 52FF 0x00 5300 TIM2 0x00 5301 ...
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Memory and register map Address Block Register label 0x00 5307 0x00 5308 0x00 5309 0x00 530A 0x00 530B 0x00 530C 0x00 530D 0x00 530E 0x00 530F 0x00 5310 0x00 5311 0x00 5312 0x00 5313 0x00 5314 0x00 5315 to Reserved ...
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STM8S005K6 STM8S005C6 Address Block Register label 0x00 5323 0x00 5324 0x00 5325 0x00 5326 0x00 5327 0x00 5328 0x00 5329 0x00 532A 0x00 532B 0x00 532C 0x00 532D 0x00 532E 0x00 532F 0x00 5330 0x00 5331 to Reserved area (15 ...
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Memory and register map Address Block Register label 0x00 5343 0x00 5344 0x00 5345 0x00 5346 0x00 5347 to Reserved area (153 bytes) 0x00 53DF 0x00 53E0 to ADC1 0x00 53F3 0x00 53F4 to Reserved area (12 bytes) 0x00 53FF ...
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STM8S005K6 STM8S005C6 Address Block Register label 0x00 540A 0x00 540B 0x00 540C 0x00 540D 0x00 540E 0x00 540F 0x00 5410 to Reserved area (1008 bytes) 0x00 57FF (1) Depends on the previous reset source. (2) Write only register. 6.2.3 CPU/SWIM/debug ...
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Memory and register map Address Block 0x00 7F05 0x00 7F06 0x00 7F07 0x00 7F08 0x00 7F09 0x00 7F0A 0x00 7F0B to Reserved area (85 bytes) 0x00 7F5F 0x00 7F60 CPU 0x00 7F70 ITC 0x00 7F71 0x00 7F72 0x00 7F73 0x00 ...
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STM8S005K6 STM8S005C6 Address Block 0x00 7F81 to Reserved area (15 bytes) 0x00 7F8F 0x00 7F90 DM 0x00 7F91 0x00 7F92 0x00 7F93 0x00 7F94 0x00 7F95 0x00 7F96 0x00 7F97 0x00 7F98 0x00 7F99 0x00 7F9A 0x00 7F9B to Reserved ...
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Interrupt vector mapping 7 Interrupt vector mapping IRQ Source no. block RESET TRAP 0 TLI 1 AWU 2 CLK 3 EXTI0 4 EXTI1 5 EXTI2 6 EXTI3 7 EXTI4 SPI 11 TIM1 12 TIM1 13 TIM 14 ...
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STM8S005K6 STM8S005C6 IRQ Source no. block 15 TIM3 16 TIM3 UART2 21 UART2 22 ADC1 23 TIM 24 Flash Reserved (1) Except PA1 Description Wakeup from halt mode Update/ overflow - Capture/ compare ...
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Option bytes 8 Option bytes Option bytes contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated block of the memory. Except for the ROP (read-out protection) byte, each ...
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STM8S005K6 STM8S005C6 Addr. Option Option Option bits name byte no. 7 NOPT6 0x480C Reserved OPT7 0x480D Reserved Reserved NOPT7 0x480E Reserved OPTBL 0x487E Bootloader BL[7:0] NOPTBL 0x487F NBL[7:0] Option byte no. OPT0 OPT1 OPT2 OPT3 Table ...
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Option bytes Option byte no. OPT4 OPT5 46/103 Description LSI_EN:Low speed internal clock enable 0: LSI clock is not available as CPU clock source 1: LSI clock is available as CPU clock source IWDG_HW: Independent watchdog 0: IWDG Independent watchdog ...
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STM8S005K6 STM8S005C6 Option byte no. OPT6 OPT7 OPTBL Table 13: Description of alternate function remapping bits [7:0] of OPT2 Option byte no. OPT2 Description Reserved Reserved BL[7:0] Bootloader option byte For STM8S products, this option is checked by the boot ...
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Option bytes Option byte no. (1) Do not use more than one remapping option in the same port. (2) Refer to pinout description. 48/103 (1) Description 0: AFR2 remapping option inactive: Default alternate function 1: Port D0 alternate function = ...
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STM8S005K6 STM8S005C6 9 Electrical characteristics 9.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 9.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply ...
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Electrical characteristics 9.1.5 Loading capacitor The loading conditions used for pin parameter measurement are shown in the following figure. 9.1.6 Pin input voltage The input voltage measurement on a pin of the device is described in the following figure. 9.2 ...
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STM8S005K6 STM8S005C6 Symbol Ratings Input voltage on any other pin |V - Variations between different power pins DDx Variations between all the different ground pins SSx SS V Electrostatic discharge voltage ESD (1) ...
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Electrical characteristics Symbol Ratings (4) (5) I INJ(PIN) (4) ΣI INJ(PIN) (1) Data based on characterization results, not tested in production. (2) All power (V DD connected to the external supply. (3) I/O pins used simultaneously for high current source/sink ...
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STM8S005K6 STM8S005C6 Symbol f CPU DD_IO (1) VCAP ( (1) Care should be taken when selecting the capacitor, due to its tolerance, as well as the parameter dependency on temperature, ...
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Electrical characteristics Functionality not guaranteed in this area Table 18: Operating conditions at power-up/power-down Symbol Parameter t V VDD Reset releasedelay TEMP V Power-on reset IT+ threshold V Brown-out reset IT- threshold V Brown-out reset HYS(BOR) ...
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STM8S005K6 STM8S005C6 1. ESR is the equivalent series resistance and ESL is the equivalent inductance. 9.3.2 Supply current characteristics The current consumption is measured as described in 9.3.2.1 Total current consumption in run mode Table 19: Total current consumption with ...
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Electrical characteristics Symbol Parameter I DD(RUN) Supply current in run mode, code executed fromFlash (1) Data based on characterization results, not tested in production. (2) Default clock configuration measured with all peripherals off. Table 20: Total current consumption with code ...
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STM8S005K6 STM8S005C6 Symbol Parameter Supply current in run mode, code executed from Flash (1) Data based on characterization results, not tested in production. (2) Default clock configuration measured with all peripherals off. Conditions /128 HSE user ext. ...
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Electrical characteristics 9.3.2.2 Total current consumption in wait mode Table 21: Total current consumption in wait mode at V Symbol Parameter I Supply DD(WFI) current in wait mode (1) Data based on characterization results, not tested in production. (2) Default ...
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STM8S005K6 STM8S005C6 Symbol Parameter (1) Data based on characterization results, not tested in production. (2) Default clock configuration measured with all peripherals off. 9.3.2.3 Total current consumption in active halt mode Table 23: Total current consumption in active halt mode ...
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Electrical characteristics Symbol Parameter (1) Data based on characterization results, not tested in production. (2) Configured by the REGAH bit in the CLK_ICKR register. (3) Configured by the AHALT bit in the FLASH_CR1 register. Table 24: Total current consumption in ...
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STM8S005K6 STM8S005C6 (1) Data based on characterization results, not tested in production. (2) Configured by the REGAH bit in the CLK_ICKR register. (3) Configured by the AHALT bit in the FLASH_CR1 register. 9.3.2.4 Total current consumption in halt mode Table ...
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Electrical characteristics Symbol Parameter Wakeup time active halt mode to run (3) mode Wakeup time active halt mode to run (3) mode t WU(AH) Wakeup time active halt mode to run (3) mode Wakeup time active halt mode to run ...
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STM8S005K6 STM8S005C6 Symbol Parameter t Reset pin release to RESETBL vector fetch (1) Data guaranteed by design, not tested in production. (2) Characterized with all I/Os tied to V 9.3.2.7 Current consumption of on-chip peripherals Subject to general operating conditions ...
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Electrical characteristics 9.3.2.8 Current consumption curves The following figures show typical current consumption measured with code executing in RAM. Figure 11: Typ. I Figure 12: Typ. I 64/103 vs. V HSE user external clock, f DD(RUN 2.95 ...
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STM8S005K6 STM8S005C6 Figure 13: Typ. I Figure 14: Typ. I Figure 15: Typ. I vs. V HSI RC osc, f DD(RUN 2.9 2.8 2.7 2.6 2.5 2.4 2.3 2.2 2.1 2 2.5 3 3.5 4 4.5 V ...
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Electrical characteristics Figure 16: Typ. I 9.3.3 External clock sources and timing characteristics HSE user external clock Subject to general operating conditions for V Table 30: HSE user external clock characteristics Symbol Parameter f User external clock source HSE_ext frequency ...
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STM8S005K6 STM8S005C6 V HSEH V HSEL HSE crystal/ceramic resonator oscillator The HSE clock can be supplied with MHz crystal/ceramic resonator oscillator. All the information given in this paragraph is based on characterization results with specified typical ...
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Electrical characteristics (2) The oscillator selection can be optimized in terms of supply current using a high quality resonator with small R value. Refer to crystal manufacturer for more details m (3) Data based on characterization results, not tested in ...
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STM8S005K6 STM8S005C6 Symbol Parameter ACC Accuracy of HSI HSI oscillator Accuracy of HSI oscillator (factory calibrated) t HSI oscillator su(HSI) wakeup time including calibration I HSI oscillator power DD(HSI) consumption (1) Refer to application note. (2) Guaranteed by design, not ...
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Electrical characteristics Symbol Parameter f Frequency LSI t LSI oscillator wakeup time su(LSI) I LSI oscillator power consumption DD(LSI) (1) Guaranteeed by design, not tested in production. Figure 20: Typical LSI frequency variation vs V 9.3.5 Memory characteristics RAM and ...
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STM8S005K6 STM8S005C6 Table 35: Flash program memory/data EEPROM memory Symbol Parameter V Operating voltage (all modes, DD execution/write/erase) t Standard programming time prog (including erase) for byte/word/block (1 byte/4 bytes/128 bytes) Fast programming time for 1 block (128 bytes) t ...
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Electrical characteristics 9.3.6 I/O port pin characteristics General characteristics Subject to general operating conditions for V pins must be kept at a fixed voltage: using the output mode of the I/O for example or an external pull-up or pull-down resistor. ...
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STM8S005K6 STM8S005C6 Figure 21: Typical V Figure 22: Typical pull-up resistance vs V Figure 23: Typical pull-up current The pull- pure resistor (slope goes through 0). and ...
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Electrical characteristics Symbol Parameter V Output low level with four pins OL sunk Output low level with eight pins sunk V Output high level with four OH pins sourced Output high level with eight pins sourced (1) Data based on ...
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STM8S005K6 STM8S005C6 Symbol Parameter Output low level with four pins sunk V Output high level with four pins OH sourced Output high level with eight pins sourced Output high level with four pins sourced (1) Data based on characterization results, ...
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Electrical characteristics Figure 26: Typ. V Figure 27: Typ. V 76/103 Figure 25: Typ 3.3 V (standard ports -40°C 1.5 25°C 1.25 85°C 1 0.75 0.5 0. [mA] ...
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STM8S005K6 STM8S005C6 Figure 28: Typ -40°C 1.5 25°C 1.25 85°C 1 0.75 0.5 0. Figure 29: Typ -40°C 1.5 25°C 1.25 85°C 1 0.75 ...
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Electrical characteristics Figure 31: Typ. V Figure 32: Typ. V Figure 33: Typ. V 78/103 - 3.3 V (standard ports -40°C 2 25°C 1.75 85°C 1.5 1.25 1 0.75 0.5 0. ...
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STM8S005K6 STM8S005C6 9.3.8 Reset pin characteristics Subject to general operating conditions for V Symbol Parameter V IL(NRST) NRST input low (1) level voltage V IH(NRST) NRST input high level voltage V OL(NRST) NRST output low level voltage R PU(NRST) NRST ...
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Electrical characteristics Figure 34: Typical NRST V Figure 35: Typical NRST pull-up resistance vs V Figure 36: Typical NRST pull-up current vs V 80/103 and 5.5 5 4.5 4 3.5 3 2.5 2 1.5 ...
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STM8S005K6 STM8S005C6 The reset network shown in the following figure protects the device against parasitic resets. The user must ensure that the level on the NRST pin can go below V 40: NRST pin characteristics For power consumption sensitive applications, ...
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Electrical characteristics Symbol Parameter (1) t SCK high and w(SCKH) low time (1) t w(SCKL) (1) t Data input su(MI) setup time (1) t su(SI) Data input setup time (1) t Data input hold h(MI) time (1) t h(SI) Data ...
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STM8S005K6 STM8S005C6 Figure 38: SPI timing diagram - slave mode and CPHA = 0 NSS input t SU(NSS) CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 t a(SO) MISO OUT P UT MOSI I NPUT Figure 39: SPI timing diagram - slave ...
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Electrical characteristics NSS input CPHA= 0 CPOL=0 CPHA= 0 CPOL=1 CPHA=1 CPOL=0 CPHA=1 CPOL=1 MISO INP UT MOSI OUTUT 1. Measurement points are made at CMOS levels: 0 9.3. interface characteristics Symbol Parameter t SCL clock ...
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STM8S005K6 STM8S005C6 Symbol Parameter t START condition hold time h(STA) t Repeated START condition su(STA) setup time t STOP condition setup time su(STO) t STOP to START condition time w(STO:STA) (bus free) C Capacitive load for each bus line b ...
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Electrical characteristics 9.3.11 10-bit ADC characteristics Subject to general operating conditions for V Symbol Parameter f ADC clock frequency ADC V Analog supply DDA V Positive reference voltage REF+ V Negative reference voltage REF- V Conversion voltage range AIN C ...
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STM8S005K6 STM8S005C6 changes of the analog input voltage have no effect on the conversion result. Values for the sample clock t S Symbol Parameter |E | Total unadjusted error Offset error Gain error G ...
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Electrical characteristics Any positive injection current within the limits specified for I port pin characteristics section does not affect the ADC accuracy. Table 45: ADC accuracy with R Symbol Parameter |E | Total unadjusted error Offset error ...
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STM8S005K6 STM8S005C6 1. Example of an actual transfer curve. 2. The ideal transfer curve 3. End point correlation line E = Total unadjusted error: maximum deviation between the actual and the ideal transfer T curves Offset error: deviation ...
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Electrical characteristics 9.3.12.1 Functional EMS (electromagnetic susceptibility) While executing a simple application (toggling 2 LEDs through I/O ports), the product is stressed by two electromagnetic events until a failure occurs (indicated by the LEDs). • FESD: Functional electrostatic discharge (positive ...
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STM8S005K6 STM8S005C6 (1) Data obtained with HSI clock configuration, after applying HW recommendations described in AN2860 (EMC guidelines for STM8S microcontrollers). 9.3.12.3 Electromagnetic interference (EMI) Emission tests conform to the IEC61967-2 standard for test software, board layout and pin loading. ...
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... Parameter LU Static latch-up class (1) Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC specifications, that means when a device belongs to class A it exceeds the JEDEC standard. B class strictly covers all the JEDEC criteria (international standard). 92/103 ...
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STM8S005K6 STM8S005C6 10 Package information In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ...
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Package information Dim. mm Min D1 6.800 D3 E 8.800 E1 6.800 0.450 L1 k 0° ccc (1) Values in inches are converted from mm and rounded to 4 decimal digits 94/103 inches Typ Max Min 7.000 ...
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STM8S005K6 STM8S005C6 10.2 32-pin LQFP package mechanical data Pin 1 1 identification Table 51: 32-pin low profile quad flat package mechanical data Dim. mm Min A A1 0.050 A2 1.350 b 0.300 c 0.090 D 8.800 ...
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Package information Dim. mm Min 0.450 L1 k 0° ccc (1) Values in inches are converted from mm and rounded to 4 decimal digits 96/103 inches Typ Max Min 5.600 0.800 0.600 0.750 0.0177 1.000 3.5° 7.0° ...
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STM8S005K6 STM8S005C6 11 Thermal characteristics The maximum chip junction temperature (T Operating conditions The maximum chip-junction temperature, T the following equation Jmax Amax Where: • the maximum ambient temperature in °C Amax • ...
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Thermal characteristics • Maximum 8 standard I/Os used at the same time in output at low level with • Maximum 4 high sink I/Os used at the same time in output at low level ...
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STM8S005K6 STM8S005C6 12 Ordering information Figure 46: STM8S005xx value line ordering information scheme Example: Product class Family type S = Standard Sub-family type 005 = Value line STM8S005x Pin count pins pins Program memory ...
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... In addition, STM8 application development is supported by a low-cost in-circuit debugger/programmer. The STice is the fourth generation of full featured emulators from STMicroelectronics. It offers new advanced debugging capabilities including profiling and coverage to help detect and eliminate bottlenecks in application execution and dead code when fine tuning an application. ...
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STM8S005K6 STM8S005C6 13.2.1 STM8 toolset STM8 toolset with STVD integrated development environment and STVP programming software is available for free download at www.st.com/mcu. This package includes: ST Visual Develop – Full-featured integrated development environment from ST, featuring • Seamless integration ...
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Revision history 14 Revision history Date Revision 14-Oct-2011 09-Jan-2012 13-Jun-2012 102/103 Table 53: Document revision history Changes 1 Initial release. 2 Updated t in Table 35: Flash program memory/data RET EEPROM memory. Updated R in Table 40: NRST pin characteristics ...
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... ST and the ST logo are trademarks or registered trademarks various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel ...