STM8L152M8T3 STMicroelectronics, STM8L152M8T3 Datasheet
STM8L152M8T3
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STM8L152M8T3 Summary of contents
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MCU Flash + 2 KB data EEPROM, RTC, LCD, timers, USARTs, I2C, SPIs, ADC, DAC, comparators Features ■ Operating conditions – Operating power supply: 1.65 to 3.6 V (without BOR), 1.8 to 3.6 ...
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Contents Contents 1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8L15xx8, STM8L15xR6 3.15.2 3.16 Beeper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Contents 9.3.8 9.3.9 9.3.10 9.3.11 9.3.12 9.3.13 9.3.14 9.3.15 9.4 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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STM8L15xx8, STM8L15xR6 List of tables Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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List of tables Table 46. Reference voltage characteristics ...
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STM8L15xx8, STM8L15xR6 List of figures Figure 1. High density and medium+ density STM8L15xx device block diagram . . . . . . . . . . . . . . 13 Figure 2. Clock tree diagram . . . . ...
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List of figures Figure 48. LQFP64 – mm, 64 pin low-profile quad flat package outline . . . . . . . . . . . . . . . . 123 Figure 49. Recommended footprint Figure ...
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... Medium+ density STM8L15xxx devices: STM8L151R6 and STM8L152R6 microcontrollers with Flash memory density of 32 Kbytes. For further details on the STMicroelectronics Ultralow power family please refer to Section 2.3: Ultralow power continuum on page For detailed information on device operation and registers, refer to the reference manual (RM0031) ...
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Description 2.1 STM8L Ultralow power 8-bit family benefits High density and medium+ density STM8L15xx devices are part of the STM8L Ultralow power family providing the following benefits: ● Integrated system – Kbytes of high-density embedded Flash program ...
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STM8L15xx8, STM8L15xR6 2.2 Device overview Table 2. High density and medium+ density STM8L15xx low power device features and peripheral counts Features Flash (Kbytes) Data EEPROM (Kbytes) RAM (Kbytes) LCD Basic Timers General purpose Advanced control SPI Communication I2C interfaces USART ...
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... STMicroelectronics microcontrollers UltraLow power strategy which also includes STM8L101xx and STM32L15xxx. The STM8L and STM32L families allow a continuum of performance, peripherals, system architecture, and features. They are all based on STMicroelectronics 0.13 µm Ultralow leakage process. Note: 1 The STM8L151xx and STM8L152xx are pin-to-pin compatible with STM8L101xx devices. ...
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STM8L15xx8, STM8L15xR6 3 Functional overview Figure 1. High density and medium+ density STM8L15xx device block diagram 1. Legend: AF: alternate function ADC: Analog-to-digital converter BOR: Brownout reset DMA: Direct memory access DAC: Digital-to-analog converter I²C: Inter-integrated circuit multimaster interface IWDG: ...
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Functional overview LCD: Liquid crystal display POR/PDR: Power on reset / power-down reset RTC: Real-time clock SPI: Serial peripheral interface SWIM: Single wire interface module USART: Universal synchronous asynchronous receiver transmitter WWDG: Window watchdog 3.1 Low power modes The high ...
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STM8L15xx8, STM8L15xR6 3.2 Central processing unit STM8 3.2.1 Advanced STM8 Core The 8-bit STM8 core is designed for code efficiency and performance with an Harvard architecture and a 3-stage pipeline. It contains 6 internal registers which are directly addressable in ...
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Functional overview 3.3 Reset and supply management 3.3.1 Power supply scheme The device requires a 1. 3.6 V operating supply voltage (V supply pins must be connected as follows: ● SS1 DD1 for ...
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STM8L15xx8, STM8L15xR6 3.3.3 Voltage regulator The high density and medium+ density STM8L15xx devices embed an internal voltage regulator for generating the 1.8 V power supply for the core and peripherals. This regulator has two different modes: ● Main voltage regulator ...
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Functional overview Figure 2. Clock tree diagram 3.5 Low power real-time clock The real-time clock (RTC independent binary coded decimal (BCD) timer/counter. Six byte locations contain the second, minute, hour (12/24 hour), week day, date, month, year, in ...
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STM8L15xx8, STM8L15xR6 3.6 LCD (Liquid crystal display) The LCD is only available on STM8L152xx devices. The liquid crystal display drives common terminals and segment terminals to drive up to 320 pixels. It can also ...
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Functional overview 3.9 Analog-to-digital converter ● 12-bit analog-to-digital converter (ADC1) with 28 channels (including 4 fast channel), temperature sensor and internal reference voltage ● Conversion time down to 1 µs with f ● Programmable resolution ● Programmable sampling time ● ...
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STM8L15xx8, STM8L15xR6 3.12 System configuration controller and routing interface The system configuration controller provides the capability to remap some alternate functions on different I/O ports. TIM4 and ADC1 DMA channels can also be remapped. The highly flexible routing interface allows ...
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Functional overview 3.14.1 16-bit advanced control timer (TIM1) This is a high-end timer designed for a wide range of control applications. With its complementary outputs, dead-time control and center-aligned PWM capability, the field of applications is extended to motor control, ...
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STM8L15xx8, STM8L15xR6 It is clocked by the internal LSI RC clock source, and thus stays active even in case of a CPU clock failure. 3.16 Beeper The beeper function outputs a signal on the BEEP pin for sound generation. The ...
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Functional overview 3.17.3 USART The USART interfaces (USART1, USART2 and USART3) allow full duplex, asynchronous communications with external devices requiring an industry standard NRZ asynchronous serial data format. It offers a very wide range of baud rates. ● 1 Mbit/s ...
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STM8L15xx8, STM8L15xR6 4 Pin description Figure 3. STM8L151M8 80-pin package pinout (without LCD) 1. Pin 22 is reserved and must be tied to V Figure 4. STM8L152M8 80-pin package pinout (with LCD Doc ID 17943 Rev 5 Pin ...
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Pin description Figure 5. STM8L151R8 and STM8L151R6 64-pin pinout (without LCD) 1. Pin 18 is reserved and must be tied to V Figure 6. STM8L152R8 and STM8L152R6 64-pin pinout (with LCD) 26/129 . DD Doc ID 17943 Rev 5 STM8L15xx8, ...
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STM8L15xx8, STM8L15xR6 Figure 7. STM8L151C8 48-pin pinout (without LCD) 1. Pin 13 is reserved and must be tied to V Figure 8. STM8L152C8 48-pin pinout (with LCD Doc ID 17943 Rev 5 Pin description 27/129 ...
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Pin description Table 4. Legend/abbreviation Type Level Port and control configuration Reset state Table 5. High density and medium+ density STM8L15x pin description Pin number Pin name ( PH0/LCD SEG 36 ( PH1/LCD SEG ...
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STM8L15xx8, STM8L15xR6 Table 5. High density and medium+ density STM8L15x pin description (continued) Pin number Pin name (3) PA7/LCD_SEG0 / TIM5_CH1 (4) PB0 /TIM2_CH1/ ( LCD_SEG10 /ADC1_IN18 / [COMP1_INP] PB1/TIM3_CH1/ ( ...
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Pin description Table 5. High density and medium+ density STM8L15x pin description (continued) Pin number Pin name PB6/SPI1_MOSI/ ( LCD_SEG16 /ADC1_IN12 /DAC_OUT2/[COMP1_INP] PB7/SPI1_MISO/ ( LCD_SEG17 / ADC1_IN11/[COMP1_INP PC0/I2C1_SDA ...
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STM8L15xx8, STM8L15xR6 Table 5. High density and medium+ density STM8L15x pin description (continued) Pin number Pin name PC4/USART1_CK/ (2) I2C1_SMB/[CCO] / (3) LCD_SEG24 /ADC1_IN4 [COMP2_INM] / [COMP1_INP] / [LCD_COM4] PC5/OSC32_IN ( /[SPI1_NSS] / (2) ...
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Pin description Table 5. High density and medium+ density STM8L15x pin description (continued) Pin number Pin name PD3/ TIM1_ETR/ (3) LCD_SEG9 / ADC1_IN19/ [COMP1_INP] PD4/TIM1_CH2 (3) /LCD_SEG18 / ADC1_IN10/ [COMP1_INP] PD4/TIM1_CH2 (3) /LCD_SEG18 / ...
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STM8L15xx8, STM8L15xR6 Table 5. High density and medium+ density STM8L15x pin description (continued) Pin number Pin name PD7/TIM1_CH1N (3) /LCD_SEG21 / ADC1_IN7/RTC_ALARM - - 36 /SPI2_NSS/[COMP1_INP]/ VREFINT PG4/LCD_SEG32 SPI2_NSS PG5/LCD_SEG33 SPI2_SCK PG6/LCD_SEG34 ...
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Pin description Table 5. High density and medium+ density STM8L15x pin description (continued) Pin number Pin name (3) PE5/LCD_SEG6 / ADC1_IN23/[COMP1_INP [COMP2_INP] / USART2_CK (3) PE6/LCD_SEG26 PVD_IN/TIM5_BKIN USART3_TX/ (3) [LCD_COM6] (3) PE6/LCD_SEG26 75 63 ...
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STM8L15xx8, STM8L15xR6 Table 5. High density and medium+ density STM8L15x pin description (continued) Pin number Pin name PF1/ADC1_IN25/ DAC_OUT2 [USART3_RX]/ [SPI1_MOSI] PF1/ADC1_IN25 DAC_OUT2/ [USART3_RX] PF2/ADC1_IN26 [SPI2_SCK]/ [USART3_SCK] PF3/ADC1_IN27 ...
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Pin description Table 5. High density and medium+ density STM8L15x pin description (continued) Pin number Pin name (3) PG3/LCD SEG [TIM3_ETR] 33 PH4/USART2_RX 34 PH5/USART2_TX PH6/USART2_CK/ 35 TIM5_CH1 36 PH7/TIM5_CH2 - ...
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STM8L15xx8, STM8L15xR6 Note: Slope control of all GPIO pins can be programmed except true open drain pins and by default is limited to 2 MHz. System configuration options As shown in Table 5: High density and medium+ density STM8L15x pin ...
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Memory and register map 5 Memory and register map 5.1 Memory mapping The memory map is shown in Figure 9. Memory map 1. Refer to Table 9 for an overview of hardware register mapping, to registers, and to Table 10 ...
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STM8L15xx8, STM8L15xR6 Table 6. Flash and RAM boundary addresses Memory area RAM Flash program memory 5.2 Register map Table 7. Factory conversion registers Address Block 0x00 4910 - 0x00 4911 - 1. The VREFINT_Factory_CONV byte represents the 8 LSB of ...
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Memory and register map Table 8. I/O port hardware register map (continued) Address Block 0x00 500F 0x00 5010 0x00 5011 Port D 0x00 5012 0x00 5013 0x00 5014 0x00 5015 0x00 5016 Port E 0x00 5017 0x00 5018 0x00 5019 ...
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STM8L15xx8, STM8L15xR6 Table 9. General hardware register map Address Block 0x00 502E to 0x00 5049 0x00 5050 0x00 5051 0x00 5052 Flash 0x00 5053 0x00 5054 0x00 5055 to 0x00 506F 0x00 5070 0x00 5071 0x00 5072 to 0x00 5074 ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 5083 DMA1 0x00 5084 0x00 5085 DMA1 0x00 5086 0x00 5087 0x00 5088 0x00 5089 0x00 508A 0x00 508B 0x00 508C DMA1 0x00 508D 0x00 508E ...
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STM8L15xx8, STM8L15xR6 Table 9. General hardware register map (continued) Address Block 0x00 509D 0x00 509E SYSCFG 0x00 509F 0x00 50A0 0x00 50A1 0x00 50A2 ITC - EXTI 0x00 50A3 0x00 50A4 0x00 50A5 0x00 50A6 0x00 50A7 WFE 0x00 50A8 ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 50CA 0x00 50CB 0x00 50CC 0x00 50CD CLK 0x00 50CE 0x00 50CF 0x00 50D0 0x00 50D1 to 0x00 50D2 0x00 50D3 WWDG 0x00 50D4 0x00 50D5 ...
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STM8L15xx8, STM8L15xR6 Table 9. General hardware register map (continued) Address Block 0x00 5148 0x00 5149 0x00 514A RTC 0x00 514B 0x00 514C 0x00 514D 0x00 514E 0x00 514F 0x00 5150 0x00 5151 RTC 0x00 5152 0x00 5153 0x00 5154 RTC ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 516A 0x00 516B RTC 0x00 516C 0x00 516D 0x00 516E to 0x00 518A 0x00 5190 CSSLSE 0x00 519A to 0x00 51FF 0x00 5200 0x00 5201 0x00 ...
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STM8L15xx8, STM8L15xR6 Table 9. General hardware register map (continued) Address Block 0x00 521F to 0x00 522F 0x00 5230 0x00 5231 0x00 5232 0x00 5233 0x00 5234 0x00 5235 USART1 0x00 5236 0x00 5237 0x00 5238 0x00 5239 0x00 523A 0x00 ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 5262 0x00 5263 0x00 5264 TIM2 0x00 5265 0x00 5266 0x00 5267 to 0x00 527F 0x00 5280 0x00 5281 0x00 5282 0x00 5283 0x00 5284 0x00 ...
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STM8L15xx8, STM8L15xR6 Table 9. General hardware register map (continued) Address Block 0x00 52B0 0x00 52B1 0x00 52B2 0x00 52B3 0x00 52B4 0x00 52B5 0x00 52B6 0x00 52B7 0x00 52B8 0x00 52B9 0x00 52BA 0x00 52BB 0x00 52BC 0x00 52BD 0x00 ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 52D2 TIM1 0x00 52D3 0x00 52D4 to 0x00 52DF 0x00 52E0 0x00 52E1 0x00 52E2 0x00 52E3 0x00 52E4 TIM4 0x00 52E5 0x00 52E6 0x00 52E7 ...
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STM8L15xx8, STM8L15xR6 Table 9. General hardware register map (continued) Address Block 0x00 5310 0x00 5311 0x00 5312 0x00 5313 TIM5 0x00 5314 0x00 5315 0x00 5316 0x00 5317 to 0x00 533F 0x00 5340 0x00 5341 0x00 5342 0x00 5343 0x00 ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 5380 0x00 5381 0x00 5382 DAC 0x00 5383 0x00 5384 0x00 5385 0x00 5386 to 0x00 5387 0x00 5388 DAC 0x00 5389 0x00 538A to 0x00 ...
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STM8L15xx8, STM8L15xR6 Table 9. General hardware register map (continued) Address Block 0x00 53A0 DAC 0x00 53A1 0x00 53A2 to 0x00 53AB 0x00 53AC 0x00 53AD 0x00 53A2 0x00 53A3 0x00 53A4 DAC 0x00 53A5 0x00 53A6 0x00 53A7 0x00 53A8 ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 53C0 0x00 53C1 0x00 53C2 0x00 53C3 SPI2 0x00 53C4 0x00 53C5 0x00 53C6 0x00 53C7 0x00 53C8 to 0x00 53DF 0x00 53E0 0x00 53E1 0x00 ...
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STM8L15xx8, STM8L15xR6 Table 9. General hardware register map (continued) Address Block 0x00 53FB to 0x00 53FF 0x00 5400 0x00 5401 0x00 5402 0x00 5403 0x00 5404 LCD 0x00 5405 0x00 5406 0x00 5407 0x00 5408 0x00 5409 0x00 540A to ...
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Memory and register map Table 9. General hardware register map (continued) Address Block 0x00 5421 LCD 0x00 5422 to 0x00 542E 0x00 542F LCD 0x00 5430 0x00 5431 0x00 5432 0x00 5433 0x00 5434 0x00 5435 0x00 5436 0x00 5437 ...
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STM8L15xx8, STM8L15xR6 Table 10. CPU/SWIM/debug module/interrupt controller registers Address Block Register label 0x00 7F00 0x00 7F01 0x00 7F02 0x00 7F03 0x00 7F04 (1) 0x00 7F05 CPU 0x00 7F06 0x00 7F07 0x00 7F08 0x00 7F09 0x00 7F0A 0x00 7F0B to 0x00 ...
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Memory and register map Table 10. CPU/SWIM/debug module/interrupt controller registers (continued) Address Block Register label 0x00 7F90 DM_BK1RE 0x00 7F91 DM_BK1RH 0x00 7F92 DM_BK1RL 0x00 7F93 DM_BK2RE 0x00 7F94 DM_BK2RH 0x00 7F95 DM DM_BK2RL 0x00 7F96 0x00 7F97 0x00 7F98 ...
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STM8L15xx8, STM8L15xR6 6 Interrupt vector mapping Table 11. Interrupt mapping IRQ Source Description No. block RESET Reset TRAP Software interrupt (2) 0 TLI External Top level Interrupt 1 FLASH EOP/WR_PG_DIS 2 DMA1 0/1 DMA1 channels 0/1 3 DMA1 2/3 DMA1 ...
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Interrupt vector mapping Table 11. Interrupt mapping (continued) IRQ Source Description No. block TIM2/ Capture/Compare/USART 20 USART2 2 interrupt TIM3 Update /Overflow/Trigger/Break/ TIM3/ USART3 transmission 21 USART3 complete/transmit data register empty interrupt TIM3 Capture/Compare/ USART3 Receive register TIM3/ 22 data ...
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STM8L15xx8, STM8L15xR6 7 Option bytes Option bytes contain configurations for device hardware features as well as the memory protection of the device. They are stored in a dedicated memory block. All option bytes can be modified in ICP mode (with ...
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Option bytes Table 13. Option byte description Option byte no. ROP[7:0] Memory readout protection (ROP) OPT0 0xAA: Disable readout protection (write access via SWIM protocol) Refer to Readout protection section in the STM8L reference manual (RM0031). UBC[7:0] Size of the ...
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STM8L15xx8, STM8L15xR6 Table 13. Option byte description (continued) Option byte no. BOR_ON: 0: Brownout reset off 1: Brownout reset on OPT5 BOR_TH[3:1]: Brownout reset thresholds. Refer to according to the value of BOR_TH bits. OPTBL[15:0]: This option is checked by ...
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Unique ID 8 Unique ID STM8 devices feature a 96-bit unique device identifier which provides a reference number that is unique for any device and in any context. The 96 bits of the identifier can never be altered by the ...
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STM8L15xx8, STM8L15xR6 9 Electrical parameters 9.1 Parameter conditions Unless otherwise specified, all voltages are referred to V 9.1.1 Minimum and maximum values Unless otherwise specified the minimum and maximum values are guaranteed in the worst conditions of ambient temperature, supply ...
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Electrical parameters 9.1.5 Pin input voltage The input voltage measurement on a pin of the device is described in Figure 11. Pin input voltage 9.2 Absolute maximum ratings Stresses above those listed as “absolute maximum ratings” may cause permanent damage ...
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STM8L15xx8, STM8L15xR6 Table 16. Current characteristics Symbol I Total current into V VDD I Total current out of V VSS Output current sunk by IR_TIM pin (with high sink LED driver capability Output current sunk by any other ...
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Electrical parameters 9.3 Operating conditions Subject to general operating conditions for V 9.3.1 General operating conditions Table 18. General operating conditions Symbol Parameter System clock (1) f SYSCLK frequency Standard operating V DD voltage Analog operating V DDA voltage Power ...
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STM8L15xx8, STM8L15xR6 9.3.2 Embedded reset and power control block characteristics Table 19. Embedded reset and power control block characteristics Symbol Parameter V rise time rate DD t VDD V fall time rate DD t Reset release delay TEMP V Power-on ...
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Electrical parameters Table 19. Embedded reset and power control block characteristics (continued) Symbol Parameter V PVD threshold 0 PVD0 V PVD threshold 1 PVD1 V PVD threshold 2 PVD2 V PVD threshold 3 PVD3 V PVD threshold 4 PVD4 V ...
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STM8L15xx8, STM8L15xR6 Figure 12. Power supply thresholds 100 mV PVD hysteresis 100 mV V BOR hysteresis POR PDR PVD output BOR reset (NRST) BOR/PDR reset (NRST) POR/PDR reset (NRST) PVD BOR always active ...
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Electrical parameters 9.3.3 Supply current characteristics Total current consumption The MCU is placed under the following conditions: ● All I/O pins in input mode with a static value at V ● All peripherals are disabled except if explicitly mentioned. In ...
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STM8L15xx8, STM8L15xR6 Table 20. Total current consumption in Run mode (continued) Para Symbol meter All peripherals OFF, code Supply executed current I DD(RUN) from Flash, in Run V from mode All peripherals OFF, ...
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Electrical parameters Figure 13. Typical I 2 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 0.2 0 1.8 1. Typical current consumption measured with code executed from RAM. Figure 14. Typical I 4 3.5 3 2.5 2 1.5 1.8 2 ...
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STM8L15xx8, STM8L15xR6 In the following table, data are based on characterization results, unless otherwise specified. Table 21. Total current consumption in Wait mode Symbol Parameter CPU not clocked, all peripherals OFF, code Supply executed from I current in RAM DD(Wait) ...
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Electrical parameters Table 21. Total current consumption in Wait mode (continued) Symbol Parameter CPU not clocked, all peripherals OFF, Supply code I current in DD(Wait) executed from Wait mode Flash, V from All ...
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STM8L15xx8, STM8L15xR6 Figure 15. Typical I 0.8 0.7 0.6 0.5 0.4 0.3 0.2 1.8 1. Typical current consumption measured with code executed from RAM. Figure 16. Typical I 0.8 0.7 0.6 0.5 0.4 0.3 0.2 1 Typical current ...
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Electrical parameters In the following table, data are based on characterization results, unless otherwise specified. Table 22. Total current consumption and timing in Low power run mode at V 3.6 V Symbol Parameter Supply current in Low I DD(LPR) power ...
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STM8L15xx8, STM8L15xR6 Figure 17. Typical I 0.02 0.015 0.01 0.005 0 1.8 vs. V (LSI clock source), all peripherals OFF DD(LPR 2.2 2.4 2.6 V (V) DD Doc ID 17943 Rev 5 Electrical parameters 2.8 3 3.2 3.4 ...
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Electrical parameters In the following table, data are based on characterization results, unless otherwise specified. Table 23. Total current consumption in Low power wait mode at V Symbol Parameter Supply current in I Low power wait DD(LPW) mode 1. No ...
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STM8L15xx8, STM8L15xR6 Figure 18. Typical I 0.02 0.015 0.01 0.005 0 1.8 1. Typical current consumption measured with code executed from RAM. vs. V (LSI clock source), all peripherals OFF DD(LPW 2.2 2.4 2.6 Doc ID 17943 Rev ...
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Electrical parameters In the following table, data are based on characterization results, unless otherwise specified. Table 24. Total current consumption and timing in Active-halt mode 1. 3 Symbol Parameter Supply current in I ...
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STM8L15xx8, STM8L15xR6 Table 24. Total current consumption and timing in Active-halt mode 1. 3.6 V (continued) DD Symbol Parameter Supply current in I DD(AH) Active-halt mode Supply current during wakeup time from I DD(WUFAH) Active-halt ...
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Electrical parameters 7. RTC enabled. Clock source = LSE 8. Wakeup time until start of interrupt vector fetch. The first word of interrupt routine is fetched 4 CPU cycles after t 9. ULP=0 or ULP=1 and FWU=1 in the PWR_CSR2 ...
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STM8L15xx8, STM8L15xR6 In the following table, data are based on characterization results, unless otherwise specified. Table 26. Total current consumption and timing in Halt mode at V Symbol Supply current in Halt mode I (Ultra low power ULP bit =1 ...
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Electrical parameters Current consumption of on-chip peripherals Table 27. Peripheral current consumption Symbol I TIM1 supply current DD(TIM1) I TIM2 supply current DD(TIM2) I TIM3 supply current DD(TIM3) I TIM5 supply current DD(TIM5) I TIM4 timer supply current DD(TIM4) I ...
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STM8L15xx8, STM8L15xR6 5. Data based on a differential I measurement between DAC in reset configuration and continuous DAC conversion /2. Floating DAC output Data based on a differential I measurement between COMP1 or COMP2 in ...
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Electrical parameters LSE external clock (LSEBYP=1 in CLK_ECKCR) The LSE is available on STM8L151xx and STM8L152xx devices only. Subject to general operating conditions for V Table 30. LSE external clock characteristics Symbol (1) External clock source frequency f LSE_ext (2) ...
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STM8L15xx8, STM8L15xR6 Figure 21. HSE oscillator circuit diagram Resonator C L2 HSE oscillator critical g ( × Π × mcrit R : Motional resistance (see crystal ...
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Electrical parameters Figure 22. LSE oscillator circuit diagram Resonator C L2 Internal clock sources Subject to general operating conditions for V High speed internal RC oscillator (HSI) In the following ...
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STM8L15xx8, STM8L15xR6 Figure 23. Typical HSI frequency vs. V Low speed internal RC oscillator (LSI) In the following table, data are based on characterization results, not tested in production. Table 34. LSI oscillator characteristics Symbol f Frequency LSI t LSI ...
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Electrical parameters Figure 24. Typical LSI clock source frequency vs. V 0.04 0.038 0.036 0.034 0.032 0.03 1.8 9.3.5 Memory characteristics T = -40 to 125 °C unless otherwise specified. A Table 35. RAM and hardware registers Symbol V Data ...
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STM8L15xx8, STM8L15xR6 Flash memory Table 36. Flash program and data EEPROM memory Symbol Parameter Operating voltage V DD (all modes, read/write/erase) Programming time for 1 or 128 bytes (block) erase/write cycles (on programmed byte) t prog Programming time for 1 ...
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Electrical parameters 9.3.6 I/O current injection characteristics As a general rule, current injection to the I/O pins, due to external voltage below V above V (for standard pins) should be avoided during normal product operation. However order to ...
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STM8L15xx8, STM8L15xR6 Table 38. I/O static characteristics Symbol Parameter V Input low level voltage IL V Input high level voltage IH V Schmitt trigger voltage hysteresis hys I Input leakage current lkg R Weak pull-up equivalent resistor PU C I/O ...
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Electrical parameters Figure 25. Typical V Figure 26. Typical V Figure 27. Typical pull-up resistance R 96/129 and V vs. V (standard I/Os and V vs. V (true open drain I/Os vs ...
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STM8L15xx8, STM8L15xR6 Figure 28. Typical pull-up current I Output driving current Subject to general operating conditions for V Table 39. Output driving current (high sink ports) I/O Symbol Type (1) V Output low level voltage for an I/O pin OL ...
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Electrical parameters Table 40. Output driving current (true open drain ports) I/O Symbol Type (1) Output low level voltage for an I/O pin The I current sunk must always respect the absolute maximum rating specified in IO ...
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STM8L15xx8, STM8L15xR6 Figure 33. Typical (high sink ports) NRST pin Subject to general operating conditions for V Table 42. NRST pin characteristics Symbol Parameter V NRST input low level voltage IL(NRST) V NRST input high ...
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Electrical parameters Figure 35. Typical NRST pull-up resistance R Figure 36. Typical NRST pull-up current I The reset network shown in must ensure that the level on the NRST pin can go below the V Table 42. Otherwise the reset ...
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STM8L15xx8, STM8L15xR6 9.3.8 Communication interfaces SPI1 - Serial peripheral interface Unless otherwise specified, the parameters given in performed under ambient temperature, f conditions summarized in the input/output alternate function characteristics (NSS, SCK, MOSI, MISO). Table 43. SPI1 characteristics Symbol Parameter ...
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Electrical parameters Figure 38. SPI1 timing diagram - slave mode and CPHA=0 NSS input t SU(NSS) CPHA= 0 CPOL=0 t w(SCKH) CPHA w(SCKL) CPOL=1 t a(SO) MISO OUT su(SI) MOSI I NPUT Figure 39. SPI1 ...
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STM8L15xx8, STM8L15xR6 Figure 40. SPI1 timing diagram - master mode 1. Measurement points are done at CMOS levels: 0.3V and 0. Doc ID 17943 Rev 5 Electrical parameters 103/129 ...
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Electrical parameters Inter IC control interface Subject to general operating conditions for V 2 The STM8L I C interface (I2C1) meets the requirements of the Standard I protocol described in the following table with the restriction ...
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STM8L15xx8, STM8L15xR6 Figure 41. Typical application with I 4.7kΩ BUS SDA t f(SDA) SCL t h(STA) 1. Measurement points are done at CMOS levels: 0 bus and timing diagram ...
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Electrical parameters 9.3.9 LCD controller (STM8L152xx only) In the following table, data are guaranteed by Design, not tested in production. Table 45. LCD characteristics Symbol V LCD V LCD0 V LCD1 V LCD2 V LCD3 V LCD4 V LCD5 V ...
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STM8L15xx8, STM8L15xR6 9.3.10 Embedded reference voltage In the following table, data are based on characterization results, not tested in production, unless otherwise specified. Table 46. Reference voltage characteristics Symbol Parameter Internal reference voltage I REFINT consumption ADC sampling time when ...
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Electrical parameters 9.3.11 Temperature sensor In the following table, data are based on characterization results, not tested in production, unless otherwise specified. Table 47. TS characteristics Symbol (1) V Sensor reference voltage at 90°C ±5 ° ...
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STM8L15xx8, STM8L15xR6 Table 49. Comparator 2 characteristics Symbol V Analog supply voltage DDA V Comparator 2 input voltage range IN t Comparator startup time START t Propagation delay d slow t Propagation delay d fast V Comparator offset error offset ...
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Electrical parameters 9.3.13 12-bit DAC characteristics In the following table, data are guaranteed by design, not tested in production. Table 50. DAC characteristics Symbol Parameter V Analog supply voltage DDA V Reference supply voltage REF+ Current consumption ...
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STM8L15xx8, STM8L15xR6 In the following table, data based on characterization results, not tested in production. Table 51. DAC accuracy Symbol Parameter DNL Differential non linearity INL Integral non linearity (4) Offset Offset error Offset1 Offset error at Code 1 (6) ...
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Electrical parameters 9.3.14 12-bit ADC1 characteristics In the following table, data are guaranteed by design, not tested in production. Table 53. ADC1 characteristics Symbol Parameter V Analog supply voltage DDA Reference supply V REF+ voltage V Lower reference voltage REF- ...
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STM8L15xx8, STM8L15xR6 Table 53. ADC1 characteristics (continued) Symbol Parameter t Sampling time S t 12-bit conversion time conv Wakeup time from OFF t WKUP state Time before a new (5) t IDLE conversion Internal reference t VREFINT voltage startup time ...
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Electrical parameters In the following three tables, data are guaranteed by characterization result, not tested in production. Table 54. ADC1 accuracy with V Symbol DNL Differential non linearity INL Integral non linearity TUE Total unadjusted error Offset Offset error Gain ...
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STM8L15xx8, STM8L15xR6 Figure 42. ADC1 accuracy characteristics [1LSB = IDEAL 4095 4094 4093 SSA Figure 43. Typical connection diagram using the ADC 1. Refer to Table 53 ...
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Electrical parameters Figure 44. Maximum dynamic current consumption on V conversion Sampling (n cycles) ADC clock I ref+ 700µA 300µA Table 57. R max for f AIN ADC Ts Ts (cycles) (µs) 2.4 V < V DDA 4 0.25 Not ...
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STM8L15xx8, STM8L15xR6 Figure 45. Power supply and reference decoupling (V Figure 46. Power supply and reference decoupling (V 1 µ µ µ Doc ID 17943 Rev 5 Electrical parameters ...
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Electrical parameters 9.3.15 EMC characteristics Susceptibility tests are performed on a sample basis during product characterization. Functional EMS (electromagnetic susceptibility) Based on a simple running application on the product (toggling 2 LEDs through I/O ports), the product is stressed by ...
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STM8L15xx8, STM8L15xR6 Table 59. EMI data Symbol Parameter S Peak level EMI 1. Not tested in production. Absolute maximum ratings (electrical sensitivity) Based on two different tests (ESD and LU) using specific measurement methods, the product is stressed in order ...
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Electrical parameters 9.4 Thermal characteristics The maximum chip junction temperature (T Table 18: General operating conditions on page The maximum chip-junction temperature, T the following equation: Where: is the maximum ambient temperature in ° C ● T Amax Θ is ...
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STM8L15xx8, STM8L15xR6 10 Package characteristics 10.1 Package mechanical data In order to meet environmental requirements, ST offers these devices in different grades of ® ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status ...
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Package characteristics Figure 47. 80-pin low profile quad flat package ( mm) Table 63. 80-pin low profile quad flat package mechanical data Symbol ...
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STM8L15xx8, STM8L15xR6 Figure 48. LQFP64 – mm, 64 pin low-profile quad flat package outline 1. Drawing is not to scale. 2. Dimensions are in millimeters. Table 64. LQFP64 – mm, 64-pin low-profile quad flat ...
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Package characteristics Figure 50. LQFP48 – mm, 48-pin low-profile quad flat package outline Pin 1 identification Drawing is not to scale. ...
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STM8L15xx8, STM8L15xR6 Figure 52. UFQFPN48 mm, 0.5 mm pitch, package (1)(2)(3) outline 1. Drawing is not to scale. 2. All leads/pads should also be soldered to the PCB to improve the lead/pad solder joint life. 3. There ...
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Ordering information scheme 11 Ordering information scheme Table 67. Ordering information scheme Example: Device family STM8 microcontroller Product type L = Low power Device subfamily 151: Devices without LCD 152: Devices with LCD Pin count pins R ...
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STM8L15xx8, STM8L15xR6 12 Revision history Table 68. Document revision history Date Revision 13-Sep-2010 20-Dec-2010 17-Jan-2011 11-Mar-2011 1 Initial release. Updated Section 9.3.3: Supply current characteristics Updated Section 9.3.2: Embedded reset and power control block characteristics. Updated Section 9.3.3: Supply current ...
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Revision history Table 68. Document revision history (continued) Date Revision 03-Apr-2013 128/129 Updated capacitive sensing channels and “Dynamic consumption” in Features Updated LCD feature in Table 2: High density and medium+ density STM8L15xx low power device features and peripheral counts ...
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