CY7C1021DV33-10BVXI Cypress Semiconductor Corp, CY7C1021DV33-10BVXI Datasheet

IC SRAM 1MBIT 10NS 48VFBGA

CY7C1021DV33-10BVXI

Manufacturer Part Number
CY7C1021DV33-10BVXI
Description
IC SRAM 1MBIT 10NS 48VFBGA
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet

Specifications of CY7C1021DV33-10BVXI

Memory Size
1M (64K x 16)
Package / Case
48-VFBGA
Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Speed
10ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Access Time
10 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Current
60 mA
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
3.3 V
Memory Configuration
64K X 16
Supply Voltage Range
3V To 3.6V
Memory Case Style
FBGA
No. Of Pins
48
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-2006

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C1021DV33-10BVXI
Manufacturer:
CYPRESS
Quantity:
11 886
Part Number:
CY7C1021DV33-10BVXI
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Part Number:
CY7C1021DV33-10BVXI
Manufacturer:
CYPRESS/赛普拉斯
Quantity:
20 000
Part Number:
CY7C1021DV33-10BVXIT
Manufacturer:
Cypress Semiconductor Corp
Quantity:
10 000
Cypress Semiconductor Corporation
Document #: 38-05460 Rev. *F
Features
Note
1. For guidelines on SRAM system design, please refer to the “System Design Guidelines” Cypress application note, available on the internet at www.cypress.com
• Temperature Ranges
• Pin-and function-compatible with CY7C1021CV33
• High speed
• Low active power
• Low CMOS standby power
• 2.0V data retention
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Independent control of upper and lower bits
• Available in Pb-free 44-pin 400-Mil wide Molded SOJ,
Logic Block Diagram
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
— Automotive-E: –40°C to 125°C
— t
— I
— I
44-pin TSOP II and 48-ball VFBGA packages
AA
CC
SB2
= 10 ns
= 60 mA @ 10 ns
= 3 mA
A
A
A
A
A
A
A
A
1
5
4
3
2
0
7
6
DATA IN DRIVERS
COLUMN DECODER
RAM Array
64K x 16
198 Champion Court
Functional Description
The CY7C1021DV33 is a high-performance CMOS static
RAM organized as 65,536 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
LOW, then data from memory will appear on I/O
the truth table at the end of this data sheet for a complete
description of Read and Write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a Write operation
(CE LOW, and WE LOW).
The CY7C1021DV33 is available in Pb-free 44-pin 400-Mil
wide Molded SOJ, 44-pin TSOP II and 48-ball VFBGA
packages.
1-Mbit (64K x 16) Static RAM
15
San Jose
). If Byte High Enable (BHE) is LOW, then data
8
through I/O
,
CA 95134-1709
0
to I/O
0
I/O
I/O
through I/O
[1]
7
0
8
BHE
WE
CE
OE
BLE
. If Byte High Enable (BHE) is
–I/O
–I/O
15
0
Revised December 14, 2010
) is written into the location
through A
7
15
CY7C1021DV33
15
) are placed in a
0
15
through I/O
).
8
408-943-2600
to I/O
15
. See
7
), is
0
[+] Feedback

Related parts for CY7C1021DV33-10BVXI

CY7C1021DV33-10BVXI Summary of contents

Page 1

... HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a Write operation (CE LOW, and WE LOW). The CY7C1021DV33 is available in Pb-free 44-pin 400-Mil wide Molded SOJ, 44-pin TSOP II and 48-ball VFBGA packages. DATA IN DRIVERS ...

Page 2

... NC pins are not connected on the die. Document #: 38-05460 Rev. *F –10 (Industrial/Automotive- 48-ball VFBGA Top View BLE OE BHE I/O BLE BHE 8 I/O 15 I/O I I I/O 10 I/O 9 I/O I CY7C1021DV33 [2] –12 (Automotive-E) Unit 12 ns 100 I I ...

Page 3

... CE > V – 0.3V > V – 0. < 0.3V Test Conditions T = 25 MHz 3. Test Conditions Still Air, soldered × 4.5 inch, four-layer printed circuit board CY7C1021DV33 Ambient V Speed CC Temperature 3.3V  0.3V – + – + –12 (Auto-E) Unit Max. Min. Max. 2.4 V 0.4 ...

Page 4

... AC characteristics (except High-Z) are tested using the load conditions shown in Figure (a). High-Z characteristics are tested for all speeds using the test load shown in Figure (c). Document #: 38-05460 Rev. *F [6] 3.0V 30 pF* GND Rise Time: 1 V/ns High-Z characteristics: R 317 3.3V OUTPUT 351 (c) CY7C1021DV33 ALL INPUT PULSES 90% 90% 10% 10% Fall Time: 1 V/ns (b) Page [+] Feedback ...

Page 5

... Write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the Write. Document #: 38-05460 Rev. *F [7] -10 (Ind’l/Auto-A) Min. Max. 100 values until the first memory access can be performed less than less than t , and t HZCE LZCE HZOE LZOE HZWE CY7C1021DV33 -12 (Auto-E) Min. Max. Unit s 100 ...

Page 6

... > V – 0. < 0. DATA RETENTION MODE 3.0V > CDR [14, 15 OHA t RC DOE DATA VALID 50% > 50 s or stable at V > 50  CC(min.) CC(min CY7C1021DV33 Min. Max. Unit 2 V Industrial 3 mA Automotive 3. DATA VALID t HZOE t HZCE t HZBE HIGH IMPEDANCE 50 Page [+] Feedback ...

Page 7

... Write Cycle No. 2 (BLE or BHE Controlled) ADDRESS t SA BHE, BLE WE CE DATA I/O Notes 17. Data I/O is high impedance BHE and/or BLE = V 18 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05460 Rev SCE PWE PWE t SCE CY7C1021DV33 Page [+] Feedback ...

Page 8

... Read – Lower bits only Data Out Read – Upper bits only Data In Write – All bits High-Z Write – Lower bits only Data In Write – Upper bits only High-Z Selected, Outputs Disabled High-Z Selected, Outputs Disabled CY7C1021DV33 LZWE Mode Power Standby ( Active (I ...

Page 9

... Ordering Information Speed (ns) Ordering Code 10 CY7C1021DV33-10VXI CY7C1021DV33-10ZSXI CY7C1021DV33-10BVXI 10 CY7C1021DV33-10ZSXA 12 CY7C1021DV33-12ZSXE Ordering Code Definitions V33 - XX XXX Please contact your local Cypress sales representative for availability of these parts. Document #: 38-05460 Rev. *F Package Package Type Name 51-85082 44-pin (400-Mil) Molded SOJ (Pb-free) 51-85087 44-pin TSOP Type II (Pb-free) ...

Page 10

... Package Diagrams Figure 1. 44-pin (400-Mil) Molded SOJ (51-85082) Figure 2. 44-pin Thin Small Outline Package Type II (51-85087) Document #: 38-05460 Rev. *F CY7C1021DV33 51-85082 *C 51-85087 *C Page [+] Feedback ...

Page 11

... Package Diagrams (continued) Figure 3. 48-ball VFBGA ( mm) (51-85150) All products and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-05460 Rev. *F CY7C1021DV33 51-85150 *F Page [+] Feedback ...

Page 12

... Document History Page Document Title: CY7C1021DV33, 1-Mbit (64K x 16) Static RAM Document Number: 38-05460 REV. ECN NO. Issue Date ** 201560 See ECN *A 233693 See ECN *B 263769 See ECN *C 307601 See ECN *D 520652 See ECN *E 2898399 03/24/2010 *F 3109897 12/14/2010 Document #: 38-05460 Rev. *F Orig. of ...

Page 13

... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. cypress.com/go/plc CY7C1021DV33 PSoC Solutions psoc.cypress.com/solutions ...

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