CY62136EV30LL-45ZSXI Cypress Semiconductor Corp, CY62136EV30LL-45ZSXI Datasheet

IC SRAM 2MBIT 45NS 44TSOP

CY62136EV30LL-45ZSXI

Manufacturer Part Number
CY62136EV30LL-45ZSXI
Description
IC SRAM 2MBIT 45NS 44TSOP
Manufacturer
Cypress Semiconductor Corp
Type
Asynchronousr
Datasheet

Specifications of CY62136EV30LL-45ZSXI

Memory Size
2M (128K x 16)
Package / Case
44-TSOP II
Format - Memory
RAM
Memory Type
SRAM
Speed
45ns
Interface
Parallel
Voltage - Supply
2.2 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Access Time
45 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.2 V
Maximum Operating Current
20 mA
Organization
128 K x 16
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Ports
1
Operating Supply Voltage
2.5 V or 3.3 V
Memory Configuration
128K X 16
Supply Voltage Range
2.2V To 3.6V
Memory Case Style
TSOP
No. Of Pins
44
Operating Temperature Range
-40°C To +85°C
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
428-2068
CY62136EV30LL-45ZSXI
Features
Note
Cypress Semiconductor Corporation
Document #: 38-05569 Rev. *D
Logic Block Diagram
1. For best practice recommendations, refer to the Cypress application note “SRAM System Design Guidelines” on http://www.cypress.com.
Very high speed: 45 ns
Wide voltage range: 2.20 V to 3.60 V
Pin compatible with CY62136CV30
Ultra low standby power
Ultra low active power
Easy memory expansion with CE and OE features
Automatic power down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed/power
Offered in a Pb-free 48-ball very fine ball grid array (VFBGA)
and 44-pin thin small outline package (TSOP II) packages
Typical standby current: 1 A
Maximum standby current: 7 A
Typical active current: 2 mA at f = 1 MHz
A
A
A
A
A
A
A
A
A
A
A
10
6
5
4
3
2
1
0
9
8
7
198 Champion Court
COLUMN DECODER
DATA IN DRIVERS
RAM Array
128K x 16
Functional Description
The CY62136EV30
organized as 128 K words by 16 bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. The device can
also be put into standby mode reducing power consumption by
more than 99% when deselected (CE HIGH). The input/output
pins (I/O
when: deselected (CE HIGH), outputs are disabled (OE HIGH),
both Byte High Enable and Byte Low Enable are disabled (BHE,
BLE HIGH), or during a write operation (CE LOW and WE LOW).
Writing to the device is accomplished by taking Chip Enable (CE)
and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is
LOW, then data from I/O pins (I/O
the location specified on the address pins (A
Byte High Enable (BHE) is LOW, then data from I/O pins (I/O
through I/O
pins (A
Reading from the device is accomplished by taking Chip Enable
(CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data
from the memory location specified by the address pins appear
on I/O
memory appear on I/O
for a complete description of read and write modes.
2-Mbit (128K x 16) Static RAM
0
0
to I/O
0
through A
through I/O
15
San Jose
7
) is written into the location specified on the address
. If Byte High Enable (BHE) is LOW, then data from
16
[1]
).
,
I/O
I/O
is a high performance CMOS static RAM
15
8
CA 95134-1709
) are placed in a high impedance state
to I/O
0
8
–I/O
–I/O
CY62136EV30 MoBL
BHE
WE
CE
OE
BLE
7
15
15
. See the
0
through I/O
Revised January 17, 2011
Truth Table
0
7
through A
), is written into
408-943-2600
®
) in portable
on page 10
16
). If
®
8
[+] Feedback

Related parts for CY62136EV30LL-45ZSXI

CY62136EV30LL-45ZSXI Summary of contents

Page 1

... Note 1. For best practice recommendations, refer to the Cypress application note “SRAM System Design Guidelines” on http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05569 Rev. *D 2-Mbit (128K x 16) Static RAM Functional Description The CY62136EV30 organized as 128 K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ ...

Page 2

Contents Pin Configuration .............................................................. 3 Product Portfolio ............................................................... 3 Maximum Ratings ............................................................. 4 Operating Range ............................................................... 4 Electrical Characteristics.................................................. 4 Capacitance ...................................................................... 4 Thermal Resistance .......................................................... 5 Data Retention Characteristics ....................................... 5 Data Retention Waveform ................................................ 5 Switching Characteristics................................................. 6 ...

Page 3

... Product V Range (V) CC Min Typ CY62136EV30LL 2.2 3.0 Notes 2. NC pins are not connected on the die. 3. Pins D3, H1, G2, H6 and H3 in the VFBGA package are address expansion pins for 4 Mb, 8 Mb, 16 Mb, and 32 Mb and 64 Mb respectively 4. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V Document #: 38-05569 Rev ...

Page 4

... Tested initially and after any design or process changes that may affect these parameters. Document #: 38-05569 Rev input voltage Output current into outputs (LOW) ............................. 20 mA Static discharge voltage ......................................... > 2001 V (per MIL-STD-883, Method 3015) Latch up current ..................................................... > 200 mA Operating Range Device + 0 MAX CY62136EV30LL Industrial + 0 MAX Test Conditions = –0 2. –1 2. ...

Page 5

Thermal Resistance Parameter [11] Description  Thermal resistance JA (junction to ambient)  Thermal resistance JC (junction to case OUTPUT 30 pF INCLUDING JIG AND SCOPE Parameters Data Retention Characteristics (Over ...

Page 6

... HZOE HZCE HZBE HZWE 20. The internal write time of the memory is defined by the overlap of WE these signals can terminate a write by going INACTIVE. The data input setup and hold timing should be referenced to the edge of the signal that terminates the write. Document #: 38-05569 Rev. *D ...

Page 7

Switching Waveforms Figure 2. Read Cycle 1: Address Transition Controlled ADDRESS DATA OUT PREVIOUS DATA VALID Figure 3. Read Cycle No Controlled ADDRESS CE t ACE OE BHE/BLE t LZOE t DBE t LZBE HIGH IMPEDANCE DATA ...

Page 8

... NOTE 27 t HZOE Notes 24. The internal write time of the memory is defined by the overlap of WE these signals can terminate a write by going INACTIVE. The data input setup and hold timing should be referenced to the edge of the signal that terminates the write. 25. Data I/O is high impedance ...

Page 9

Switching Waveforms (continued) Figure 6. Write Cycle No Controlled, OE LOW ADDRESS CE BHE/BLE NOTE 29 DATAI/O t HZWE Figure 7. Write Cycle No. 4: BHE/BLE Controlled, OE LOW ADDRESS CE BHE/BLE ...

Page 10

Truth Table BHE BLE [30] [30] [30 ...

Page 11

... Ordering Information Speed Ordering Code (ns) 45 CY62136EV30LL-45BVXI CY62136EV30LL-45ZSXI Contact your local Cypress sales representative for availability of other parts Ordering Code Definition CY 621 3 6E V30 LL Document #: 38-05569 Rev. *D Package Package Type Diagram 51-85150 48-Ball Very Fine Pitch Ball Grid Array (Pb-free) 51-85087 ...

Page 12

Package Diagrams Figure 8. 48-Pin VFBGA ( mm) (51-85150) Document #: 38-05569 Rev. *D ® CY62136EV30 MoBL 51-85150-*F Page [+] Feedback ...

Page 13

... Package Diagrams (continued) Acronyms Acronym Description CMOS complementary metal oxide semiconductor I/O input/output SRAM static random access memory VFBGA very fine ball gird array TSOP thin small outline package Document #: 38-05569 Rev. *D Figure 9. 44-Pin TSOP II (51-85087) Document Conventions Units of Measure Symbol ° ...

Page 14

... Static RAM Date Description of Change New Data Sheet Converted from Advanced Information to Final. Changed the address of Cypress Semiconductor Corporation on Page #1 from “3901 North First Street” to “198 Champion Court” Removed 35ns Speed Bin Removed “L” version of CY62136EV30 Changed I (Max) value from ...

Page 15

... Cypress against all charges. Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement ...

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