DS2505P+T&R Maxim Integrated Products, DS2505P+T&R Datasheet

IC OTP 16KBIT 6TSOC

DS2505P+T&R

Manufacturer Part Number
DS2505P+T&R
Description
IC OTP 16KBIT 6TSOC
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS2505P+T&R

Format - Memory
EPROMs
Memory Type
OTP EPROM
Memory Size
16K (16K x 1)
Interface
1-Wire Serial
Operating Temperature
-40°C ~ 85°C
Package / Case
6-TSOC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Voltage - Supply
-
Speed
-
www.maxim-ic.com
FEATURES
 16384 bits Electrically Programmable Read
 Unique, factory-lasered and tested 64-bit
 Built-in
 EPROM partitioned into sixty-four 256-bit
 Each memory page can be permanently write-
 Device is an “add only” memory where
 Architecture allows software to patch data by
 Reduces control, address, data, power, and
 Directly connects to a single port pin of a
 8-bit
 Presence detector acknowledges when the
 Low cost TO-92 or 6-pin TSOC surface
 Reads over a wide voltage range of 2.8V to
1-Wire is a registered trademark of Maxim Integrated Products, Inc.
Only Memory (EPROM) communicates with
the economy of one signal plus ground
registration number (8-bit family code +
48-bit serial number + 8-bit CRC tester)
assures absolute traceability because no two
parts are alike
compatibility
products
pages for randomly accessing packetized data
records
protected to prevent tampering
additional data can be programmed into
EPROM without disturbing existing data
superseding an old page in favor of a newly
programmed page
programming signals to a single data pin
microprocessor and communicates at up to
16.3 kbits per second
communications requirements to reader
reader first applies voltage
mount package
6.0V from -40°C to +85°C; programs at
11.5V to 12.0V from -40°C to +50°C
family
multidrop
with
code
other
controller
specifies
1-Wire
DS2505
ensures
Net
1 of 24
PIN ASSIGNMENT
NOTE: The leads of TO-92 packages on tape-
and-reel are formed to approximately 100 mil
(2.54 mm) spacing. For details see the Package
Information section.
ORDERING INFORMATION
DS2505
DS2505/T&R
DS2505P
DS2505P/T&R TSOC Package, Tape & Reel
DS2505+
DS2505+T&R
DS2505P+
DS2505P+T&R TSOC Package, Tape & Reel
+ Denotes a lead(Pb)-free/RoHS-compliant
package.
Bottom View
16Kb Add-Only Memory
1 2 3
DALLAS
TO-92
DS2505
TO-92 Package
TO-92 Package, Tape & Reel
TSOC Package
TO-92 Package
TO-92 Package, Tape & Reel
TSOC Package
DATA
GND
3.7 X 4.0 X 1.5 mm
TSOC PACKAGE
NC
Drawing Section
Top View
Side View
See Mech.
1
2
3
DS2505
6
5
4
071107
NC
NC
NC

Related parts for DS2505P+T&R

DS2505P+T&R Summary of contents

Page 1

... Low cost TO-92 or 6-pin TSOC surface mount package  Reads over a wide voltage range of 2.8V to 6.0V from -40°C to +85°C; programs at 11.5V to 12.0V from -40°C to +50°C 1-Wire is a registered trademark of Maxim Integrated Products, Inc. PIN ASSIGNMENT ensures 1-Wire Net ...

Page 2

... EPROM portions of the DS2505 become accessible and the bus master may issue any one of the five Memory Function Commands specific to the DS2505 to read or program the various data fields. The protocol for these Memory Function Commands is described in Figure 5. All data is read and written least significant bit first ...

Page 3

... ROM function commands: 1) Read ROM, 2) Match ROM, 3) Search ROM Skip ROM. After a ROM function sequence has been successfully executed, the bus master may then provide any one of the memory function commands specific to the DS2505 (Figure 5). ...

Page 4

... MSB 16384-BITS EPROM The memory map in Figure 4 shows the 16384-bit EPROM section of the DS2505 which is configured as 64 pages of 32 bytes each. The 8-bit scratchpad is an additional register that acts as a buffer when programming the memory. Data is first written to the scratchpad and then verified by reading a 16-bit CRC from the DS2505 that confirms proper receipt of the data and address ...

Page 5

... Page Address Redirection Byte, making it point to a different memory page than the true one Page Address Redirection Byte has a FFH value, the data in the main memory that corresponds to that page is valid Page Address Redirection Byte has some other hex value, the data in the page corresponding to that redirection byte is invalid, and the valid data can now be found at the one’ ...

Page 6

... The Status Memory address range of the DS2505 extends from 000 to 13FH. The memory locations 008H to 01FH, 028H to 03FH, 048H to 0FFH and 140H to 7FFH are physically not implemented. Reading these locations will usually result in FFH bytes. Attempts to write to these locations will be ignored. If the bus master sends a starting address higher than 7FFH, the five most significant address bits are set the internal circuitry of the chip ...

Page 7

... Any reads ended by a reset pulse prior to reaching the end of memory will not have the 16-bit CRC available. Typically a 16-bit CRC would be stored with each page of data to ensure rapid, error-free data transfers that eliminate having to read a page multiple times to determine if the received data is correct or not ...

Page 8

... MEMORY FUNCTION FLOW CHART Figure ...

Page 9

... MEMORY FUNCTION FLOW CHART Figure 5 (cont’ ...

Page 10

... MEMORY FUNCTION FLOW CHART Figure 5 (cont’ ...

Page 11

... Memory command is that the bus master receives the Redirection Byte first before investing time in reading data from the addressed memory location. This allows the bus master to quickly decide whether to continue and access the data at the selected starting page or to terminate and restart the reading process at the redirected page address ...

Page 12

... The Extended Read Memory command provides a 16-bit CRC at two locations within the transaction flow chart: 1) after the Redirection Byte and 2) at the end of each memory page. The CRC at the end of the memory page is always the result of clearing the CRC generator and shifting in the data bytes beginning at the first addressed memory location of the EPROM data page until the last byte of this page ...

Page 13

... DS2505. The Write Memory command sequence can be ended at any point by issuing a reset pulse. To save time when writing more than 1 consecutive byte of the DS2505’s data memory it is possible to omit reading the 16-bit CRC which allows verification of data and address before the data is copied to the EPROM memory. This saves 16 time slots or 976 µ ...

Page 14

... DS2505. The Write Status command sequence can be ended at any point by issuing a Reset Pulse. To save time when writing more than 1 consecutive byte of the DS2505’s status memory it is possible to omit reading the 16-bit CRC which allows verification of data and address before the data is copied to the EPROM memory. This saves 16 time slots or 976 µ ...

Page 15

... Transaction Sequence The sequence for accessing the DS2505 via the 1-Wire port is as follows:  Initialization  ROM Function Command  Memory Function Command  Read/Write Memory/Status INITIALIZATION All transactions on the 1-Wire bus begin with an initialization sequence. The initialization sequence consists of a reset pulse transmitted by the bus master followed by a presence pulse(s) transmitted by the slave(s) ...

Page 16

DS2505 EQUIVALENT CIRCUIT Figure 6 BUS MASTER CIRCUIT Figure ...

Page 17

ROM FUNCTIONS FLOW CHART Figure ...

Page 18

... If the data bit is a “1”, the device will leave the read data time slot unchanged. PROGRAM PULSE To copy data from the 8-bit scratchpad to the EPROM Data or Status Memory, a program pulse of 12 volts is applied to the data line after the bus master has confirmed that the CRC for the current byte is correct ...

Page 19

Note that due to the high voltage programming requirements for any 1-Wire EPROM ...

Page 20

READ/WRITE TIMING DIAGRAM Figure 10 (cont’d) NOTE: For read-data time slots the optimal sampling point for the master is as close as possible to the end of the t period without exceeding the 15 µs window. For the case of ...

Page 21

... This CRC is used to safeguard user-defined EPROM data when reading data memory or status memory the same type of CRC as is used with NV RAM based iButtons to safeguard data packets of the iButton File Structure. In contrast to the 8-bit CRC, the 16-bit CRC is always returned in the complemented (inverted) form. A CRC-generator inside the DS2505 chip (Figure 12) will calculate a new 16-bit CRC at every situation shown in the command flow chart of Figure 5 ...

Page 22

... CRC is transmitted. One 16-bit CRC follows each Redirection Byte; another 16-bit CRC is received after the last byte of a memory data page is read. The CRC at the end of the memory page is always the result of clearing the CRC generator and shifting in the data bytes beginning at the first addressed memory location of the EPROM data page until the last byte of this page ...

Page 23

ABSOLUTE MAXIMUM RATINGS* Voltage on any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature * This is a stress rating only and functional operation of the device at these or any other conditions outside those indicated in the ...

Page 24

... If V PUP may not reproduce the correct memory contents. Therefore, under low voltage conditions recommended to set either the most significant bit or all five most significant bits of TA2 to 1. Internal circuitry of the chip will force these 5 bits back to 0 before they are shifted in the address counter and CRC generator ...

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