24LC256-I/SN Microchip Technology, 24LC256-I/SN Datasheet - Page 11

no-image

24LC256-I/SN

Manufacturer Part Number
24LC256-I/SN
Description
IC EEPROM 256KBIT 400KHZ 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of 24LC256-I/SN

Memory Size
256K (32K x 8)
Package / Case
8-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
32 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.4 MHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
24LC256I/SN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
24LC256-I/SN
Manufacturer:
MICROCHIP
Quantity:
5 700
Part Number:
24LC256-I/SN
Manufacturer:
MCP
Quantity:
99 812
Part Number:
24LC256-I/SN
Manufacturer:
MIC
Quantity:
1 000
Part Number:
24LC256-I/SN
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
24LC256-I/SN
Manufacturer:
MICROCH
Quantity:
4 559
Part Number:
24LC256-I/SN-G
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Part Number:
24LC256-I/SNG
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
7.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (This feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition, followed by the control byte
for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, the Start bit and control byte must
be resent. If the cycle is complete, then the device will
return the ACK and the master can then proceed with
the next Read or Write command. See Figure 7-1 for
flow diagram.
 2010 Microchip Technology Inc.
ACKNOWLEDGE POLLING
24AA256/24LC256/24FC256
FIGURE 7-1:
Initiate Write Cycle
Send Control Byte
Write Command
Acknowledge
with R/W = 0
Condition to
Did Device
(ACK = 0)?
Send Start
Send Stop
Operation
Send
Next
ACKNOWLEDGE
POLLING FLOW
YES
DS21203Q-page 11
NO

Related parts for 24LC256-I/SN