CY7C09089V-12AC Cypress Semiconductor Corp, CY7C09089V-12AC Datasheet
CY7C09089V-12AC
Specifications of CY7C09089V-12AC
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CY7C09089V-12AC Summary of contents
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... Features • True Dual-Ported memory cells which allow simulta- neous access of the same memory location • 6 Flow-Through/Pipelined devices — 32K x 8/9 organizations (CY7C09079V/179V) — 64K x 8/9 organizations (CY7C09089V/189V) — 128K x 8/9 organizations (CY7C09099V/199V) • 3 Modes — Flow-Through — Pipelined — Burst • ...
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... When writing simultaneously to the same location, the final value cannot be guaranteed. 5. This pin is NC for CY7C09079V. 6. This pin is NC for CY7C09079V and CY7C09089V. Document #: 38-06043 Rev HIGH on CE down the internal circuitry to reduce the static power consump- tion. The use of multiple Chip Enables allows easier banking of multiple chips for depth expansion configurations ...
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... For CY7C09079V and CY7C09089V, pin #23 connected to V pin compatible with an IDT 5V x16 flow-through device. Pin Configurations (continued) 100 A7L 3 A8L 4 A9L 5 A10L 6 A11L 7 A12L 8 A13L 9 A14L 10 [8] A15L 11 [9] A16L 12 VCC CE0L 18 CE1L 19 CNTRSTL 20 R/WL 21 OEL 22 FT/PIPEL Selection Guide CY7C09079V/89V/99V CY7C09179V/89V/99V ...
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... Output Enable Input. This signal must be asserted LOW to enable the I/O data pins during read L R operations. R/W R/W Read/Write Enable Input. This signal is asserted LOW to write to the dual port memory array For read operations, assert this pin HIGH. FT/PIPE FT/PIPE Flow-Through/Pipelined Select Input ...
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Electrical Characteristics Over the Operating Range Parameter Description V Output HIGH Voltage ( –4.0 mA Output LOW Voltage ( +4.0 mA Input HIGH Voltage IH V Input LOW Voltage IL ...
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AC Test Loads 3. 590 OUTPUT 435 (a) Normal Load (Load 1) AC Test Loads (Applicable to -6 and -7 only OUTPUT C V (a) ...
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Switching Characteristics Over the Operating Range Parameter Description f f Flow-Through MAX1 Max f f Pipelined MAX2 Max t Clock Cycle Time - Flow-Through CYC1 t Clock Cycle Time - Pipelined CYC2 t Clock HIGH Time - Flow-Through CH1 t ...
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Switching Waveforms (continued) Read Cycle for Flow-Through Output (FT/PIPE = V t CH1 CLK R ADDRESS DATA OUT t CKLZ OE Read ...
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Switching Waveforms (continued) [20, 21] Bank Select Pipelined Read - t CYC2 t t CH2 CLK ADDRESS A (B1 0(B1) DATA OUT(B1 ADDRESS A (B2) ...
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... OUT OE Notes: 26. Output state (HIGH, LOW, or high-impedance) is determined by the previous cycle control signals. 27. CE and ADS = CNTEN, and CNTRST = 28. During “No Operation”, data in memory at the selected address may be corrupted and should be re-written to ensure data integrity. Document #: 38-06043 Rev. *A [19, 26, 27, 28 ...
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Switching Waveforms (continued) Flow-Through Read-to-Write-to-Read ( CYC1 t t CH1 CL1 CLK R ADDRESS DATA IN t CD1 DATA ...
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Switching Waveforms (continued) Pipelined Read with Address Counter Advance t CYC2 t t CH2 CL2 CLK ADDRESS SAD HAD ADS CNTEN t t SCN HCN DATA OUT Q x-1 READ EXTERNAL ADDRESS ...
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Switching Waveforms (continued) Write with Address Counter Advance (Flow-Through or Pipelined Outputs) t CYC2 t t CH2 CL2 CLK ADDRESS n INTERNAL A n ADDRESS t t SAD HAD ADS CNTEN t t SCN HCN ...
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Switching Waveforms (continued) Counter Reset (Pipelined Outputs) t CYC2 t t CH2 CL2 CLK ADDRESS INTERNAL A X ADDRESS SAD HAD ADS t t SCN HCN CNTEN t t SRST HRST CNTRST t SD DATA ...
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Read/Write and Enable Operation Inputs OE CLK Address Counter Control Operation Previous Address Address CLK ADS ...
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... CY7C09079V-7AI 9 CY7C09079V-9AC 12 CY7C09079V-12AC 64K x8 3.3V Synchronous Dual-Port SRAM Speed (ns) Ordering Code [1] 6.5 CY7C09089V-6AC [1] 7.5 CY7C09089V-7AC 9 CY7C09089V-9AC 12 CY7C09089V-12AC 128K x8 3.3V Synchronous Dual-Port SRAM Speed (ns) Ordering Code [1] 6.5 CY7C09099V-6AC [1] 7.5 CY7C09099V-7AC 9 CY7C09099V-9AC CY7C09099V-9AI 12 CY7C09099V-12AC 32K x9 3.3V Synchronous Dual-Port SRAM Speed (ns) Ordering Code [1] 6 ...
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... Document #: 38-06043 Rev. *A © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...
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Document Title: CY7C09079V/89V/99V, CY7C09179V/89V/99V 3.3V 32K/64K/128K x 8/9Synchronous Dual Port Static RAM Document Number: 38-06043 Issue REV. ECN NO. Date ** 110191 09/29/01 *A 122293 12/27/02 Document #: 38-06043 Rev. *A Orig. of Change Description of Change SZV Change from ...