IDT70V25L25PFGI IDT, Integrated Device Technology Inc, IDT70V25L25PFGI Datasheet

IC SRAM 128KBIT 25NS 100TQFP

IDT70V25L25PFGI

Manufacturer Part Number
IDT70V25L25PFGI
Description
IC SRAM 128KBIT 25NS 100TQFP
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of IDT70V25L25PFGI

Format - Memory
RAM
Memory Type
SRAM - Dual Port, Asynchronous
Memory Size
128K (8K x 16)
Speed
25ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
70V25L25PFGI
800-1389

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IDT70V25L25PFGI
Manufacturer:
IDT
Quantity:
825
Part Number:
IDT70V25L25PFGI
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Part Number:
IDT70V25L25PFGI8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Functional Block Diagram
NOTES:
1. A
2. (MASTER): BUSY is output; (SLAVE): BUSY is input.
3. BUSY outputs and INT outputs are non-tri-stated push-pull.
4. I/O
5. I/O
©2008 Integrated Device Technology, Inc.
Features
True Dual-Ported memory cells which allow simultaneous
reads of the same memory location
High-speed access
IDT70V35/34
– Commercial: 15/20/25ns (max.)
– Industrial: 20ns
IDT70V25/24
– Commercial: 15/20/25/35/55ns (max.)
– Industrial: 20/25ns
Low-power operation
– IDT70V35/34S
– IDT70V25/24S
12
0
8
x - I/O
x - I/O
Active: 430mW (typ.)
Standby: 3.3mW (typ.)
Active: 400mW (typ.)
Standby: 3.3mW (typ.)
is a NC for IDT70V34 and for IDT70V24.
I/O
I/O
9L
0L
7
15
x for IDT70V25/24.
-I/O
BUSY
x for IDT70V25/24.
-I/O
A
SEM
R/W
12L
INT
UB
CE
OE
LB
17L
A
8L
(1)
0L
L
L
L
L
L
L
L
L
(4)
(5)
(2,3)
(3)
– IDT70V25/24L
– IDT70V35/34L
Decoder
Address
Standby: 660 µ W (typ.)
Active: 415mW (typ.)
Active: 380mW (typ.)
R/W
Standby: 660 µ W (typ.)
CE
OE
L
L
L
HIGH-SPEED 3.3V
8/4K x 18 DUAL-PORT
8/4K x 16 DUAL-PORT
STATIC RAM
13
Control
I/O
ARBITRATION
SEMAPHORE
INTERRUPT
MEMORY
ARRAY
LOGIC
M/S
1
Separate upper-byte and lower-byte control for multiplexed
bus compatibility
IDT70V35/34 (IDT70V25/24) easily expands data bus width
to 36 bits (32 bits) or more using the Master/Slave select
when cascading more than one device
M/S = V
M/S = V
BUSY and Interrupt Flag
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
LVTTL-compatible, single 3.3V (±0.3V) power supply
Available in a 100-pin TQFP (IDT70V35/24) & (IDT70V25/24),
86-pin PGA (IDT70V25/24) and 84-pin PLCC (IDT70V25/24)
Industrial temperature range (-40°C to +85°C) is available
for selected speeds
Green parts available, see ordering information
Control
I/O
IH
IL
for BUSY input on Slave
for BUSY output flag on Master
13
Decoder
Address
CE
OE
R/W
R
R
R
IDT70V35/34S/L
IDT70V25/24S/L
OCTOBER 2008
5624 drw 01
I/O
I/O
R/W
UB
LB
CE
OE
BUSY
A
SEM
INT
A
12R
0R
9R
0R
R
R
R
R
R
-I/O
R
-I/O
(1)
R
(3)
R
(2,3)
17R
8R
DSC-5624/7
(4)
(5)
,

Related parts for IDT70V25L25PFGI

IDT70V25L25PFGI Summary of contents

Page 1

... Features True Dual-Ported memory cells which allow simultaneous reads of the same memory location High-speed access IDT70V35/34 – Commercial: 15/20/25ns (max.) – Industrial: 20ns IDT70V25/24 – Commercial: 15/20/25/35/55ns (max.) – Industrial: 20/25ns Low-power operation – IDT70V35/34S – IDT70V35/34L Active: 430mW (typ.) Active: 415mW (typ.) Standby: 660 µ ...

Page 2

... This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down Pin Configurations (1,2,3,4) 06/24/04 ...

Page 3

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Pin Configurations (1,2,3,4) 06/24/04 Index 100 ...

Page 4

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Pin Configurations (1,2,3,4) 06/11/ I/O I/O I I/O I/O I/O 10L I/O I/O ...

Page 5

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Pin Configurations (1,2,3,4) 06/08/04 INDEX I I I/O 10L 14 ...

Page 6

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Pin Names Left Port Right Port CE CE Chip Enable L R R/W R/W Read/Write Enable Output Enable L R (1) (1) A ...

Page 7

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Absolute Maximum Ratings Symbol Rating (2) V Terminal Voltage TERM with Respect to GND T Temperature BIAS Under Bias T Storage STG Temperature T Junction Temperature JN ...

Page 8

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V35/34 Symbol Parameter Dynamic Operating , Outputs Disabled DD IL SEM ...

Page 9

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V25/24 Symbol Parameter Dynamic Operating , Outputs Open DD IL SEM ...

Page 10

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V35/34 Symbol Parameter READ CYCLE t Read Cycle Time RC t Address Access Time AA ...

Page 11

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V25/24 Symbol Parameter READ CYCLE t Read Cycle Time RC t Address Access Time AA ...

Page 12

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage for 70V35/34 Symbol WRITE CYCLE t Write Cycle Time WC (3) t Chip Enable to End-of-Write EW ...

Page 13

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage for 70V25/24 Symbol WRITE CYCLE t Write Cycle Time WC (3) t Chip Enable to End-of-Write EW ...

Page 14

... DW the specified access SRAM and SEM = ( ( ( LOW and a LOW CE and a LOW R/W for memory array writing cycle. To access Semaphore and 6.42 14 Industrial and Commercial Temperature Ranges (1,5, allow the I/O drivers to turn off and data and SEM = must be met for either condition ...

Page 15

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Timing Waveform of Semaphore Read after Write Timing, Either Side A -A VALID ADDRESS 0 2 SEM I R/W OE NOTES ...

Page 16

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V35/34 Symbol BUSY TIMING (M BUSY Access Time from Address Match ...

Page 17

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V25/24 Symbol Parameter BUSY TIMING (M BUSY Access Time from Address ...

Page 18

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Timing Waveform of Write with BUSY R/W "A" BUSY "B" R/W "B" NOTES: must be met for both master BUSY input (slave) and output (master ...

Page 19

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM AC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range for 70V35/34 Symbol Parameter INTERRUPT TIMING t Address Set-up Time AS t Write Recovery Time WR ...

Page 20

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Waveform of Interrupt Timing ADDR "A" ( "A" R/W "A" INT "B" ADDR "B" "B" OE "B" INT "B" NOTES: 1. ...

Page 21

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Truth Table III — Interrupt Flag Left Port 12L 1FFF ...

Page 22

... HIGH). When a port is enabled, access to the entire memory array is permitted. Interrupts If the user chooses the interrupt function, a memory location (mail box or message center) is assigned to each port. The left port interrupt flag (INT ) is asserted when the right port writes to memory location 1FFE ...

Page 23

... The eight semaphore flags reside within the IDT70V35/34 (IDT70V25/ 24 separate memory space from the Dual-Port SRAM. This address space is accessed by placing a LOW input on the SEM pin (which acts as Industrial and Commercial Temperature Ranges ...

Page 24

... Semaphores are a useful form of arbitration in systems like disk interfaces where the CPU must be locked out of a section of memory during a transfer and the I/O device cannot tolerate any wait states. With the use of semaphores, once the two devices has determined which memory area was “ ...

Page 25

IDT70V35/34S/L (IDT70V25/24S/L) High-Speed 3.3V 8/ (8/4K x 16) Dual-Port Static RAM Ordering Information A XXXXX A 999 A Device Power Speed Package Step Type NOTES: 1. Contact your local sales office for Industrial temp range for other speeds, ...

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