IC EEPROM 1KBIT 3MHZ 8DIP

 

93C46C-E/P

Manufacturer Part Number93C46C-E/P
DescriptionIC EEPROM 1KBIT 3MHZ 8DIP
ManufacturerMicrochip Technology
93C46C-E/P datasheets

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Specifications of 93C46C-E/P

Format - MemoryEEPROMs - SerialMemory TypeEEPROM
Memory Size1K (128 x 8 or 64 x 16)Speed3MHz
InterfaceMicrowire, 3-Wire SerialVoltage - Supply4.5 V ~ 5.5 V
Operating Temperature-40°C ~ 125°CPackage / Case8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
2.8
Write
The WRITE instruction is followed by 8 bits (if ORG is
low or A-version devices) or 16 bits (if ORG pin is high
or B-version devices) of data, which are written into the
specified address. For 93AA46A/B/C and 93LC46A/B/C
devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase and
programming cycle. For 93C46A/B/C devices, the self-
timed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
FIGURE 2-8:
WRITE TIMING FOR 93AA AND 93LC DEVICES
CS
CLK
A
1
0
1
N
DI
High-Z
DO
FIGURE 2-9:
WRITE TIMING FOR 93C DEVICES
CS
CLK
0
A
1
1
N
DI
High-Z
DO
DS21749H-page 10
The DO pin indicates the Ready/
device if CS is brought high after a minimum of 250 ns
low (T
). DO at logical ‘0’ indicates that programming
CSL
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
Note:
After the Write cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/
T
CSL
A0
Dx
D0
•••
•••
Busy
T
WC
T
CSL
•••
A0
Dx
•••
D0
Busy
T
WC
status of the
Busy
status from DO.
Busy
T
T
SV
CZ
Ready
High-Z
T
T
SV
CZ
Ready
High-Z
 2010 Microchip Technology Inc.