24LCS22A-I/SN Microchip Technology, 24LCS22A-I/SN Datasheet

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24LCS22A-I/SN

Manufacturer Part Number
24LCS22A-I/SN
Description
IC EEPROM 2KBIT 400KHZ 8SOIC
Manufacturer
Microchip Technology
Datasheets

Specifications of 24LCS22A-I/SN

Memory Size
2K (256 x 8)
Package / Case
8-SOIC (3.9mm Width)
Operating Temperature
-40°C ~ 85°C
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
100kHz, 400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Organization
256 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.1 MHz
Access Time
3500 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
3 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
24LCS22A-I/SNG
24LCS22A-I/SNG
24LCS22AI/SN

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
24LCS22A-I/SN
Manufacturer:
MICROCHIP
Quantity:
12 000
Part Number:
24LCS22A-I/SN
Manufacturer:
MIC
Quantity:
20 000
Features:
• Single Supply with Operation down to 2.5V
• Supports Enhanced EDID
• Completely Implements DDC1
• 2 Kbit Serial EEPROM Low-Power CMOS
• 2-Wire Serial Interface Bus, I
• 100 kHz (2.5V) and 400 kHz (5V) Compatibility
• Self-Timed Write Cycle (including Auto-Erase)
• Hardware Write-Protect Pin
• Page Write Buffer for up to Eight Bytes
• 1,000,000 Erase Write Cycles
• Data Retention >200 years
• ESD Protection >4000V
• 8-pin PDIP and SOIC Packages
• Available Temperature Ranges:
• Pb-Free and RoHS Compliant
Description:
The Microchip Technology Inc. 24LCS22A is a 256 x 8-bit
dual-mode Electrically Erasable PROM (EEPROM). This
device is designed for use in applications requiring
storage and serial transmission of configuration and
control information. Two modes of operation have been
implemented:
Bidirectional mode (2 Kbit). Upon power-up, the device
will be in the Transmit-Only mode, sending a serial bit
stream of the memory array from 00h to 7Fh, clocked by
the VCLK pin. A valid high-to-low transition on the SCL pin
will cause the device to enter the Transition mode, and
look for a valid control byte on the I
valid control byte from the master, it will switch into
Bidirectional mode, with byte selectable read/write
capability of the entire 2K memory array using SCL. If no
control byte is received, the device will revert to the Trans-
mit-Only mode after it receives 128 consecutive VCLK
pulses while the SCL pin is idle. The 24LCS22A is avail-
able in standard 8-pin PDIP and SOIC packages. The
24LCS22A features a flexible write-protect pin which is
enabled by writing to address 7Fh (usually the checksum
in VESA
© 2009 Microchip Technology Inc.
face for Monitor Identification, including Recovery
to DDC1
Technology:
- 1 mA active current, typical
- 10 μA standby current, typical at 5.5V
- Industrial (I)
®
applications.
Transmit-Only
-40°C
2K VESA
to +85°C
(E-EDID
2
mode
C
2
/DDC2
C bus. If it detects a
Compatible
(1
®
) 1.3
Inter-
Kbit)
E-EDID
and
Package Types
Block Diagram
Serial EEPROM
SDA
PDIP/SOIC
Vcc
Vss
* Pins labeled ‘NC’ have no internal connection
Control
VCLK
Logic
I/O
SCL
24LCS22A
*NC
*NC
V
WP
SS
Control
Memory
Logic
WP
1
2
3
4
XDEC
8
7
6
5
DS21682E-page 1
V
VCLK
SCL
SDA
Page Latches
HV Generator
R/W Control
CC
Sense Amp.
EEPROM
Array
YDEC

Related parts for 24LCS22A-I/SN

24LCS22A-I/SN Summary of contents

Page 1

... SCL control byte is received, the device will revert to the Trans- mit-Only mode after it receives 128 consecutive VCLK pulses while the SCL pin is idle. The 24LCS22A is avail- able in standard 8-pin PDIP and SOIC packages. The 24LCS22A features a flexible write-protect pin which is enabled by writing to address 7Fh (usually the checksum ® ...

Page 2

... ELECTRICAL CHARACTERISTICS (†) Absolute Maximum Ratings V .............................................................................................................................................................................7.0V CC All inputs and outputs w.r.t. V ......................................................................................................... -0. Storage temperature ...............................................................................................................................-65°C to +150°C Ambient temperature with power applied ................................................................................................-40°C to +125°C ESD protection on all pins ......................................................................................................................................................≥ † Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device ...

Page 3

... Units Conditions 2.5V ≤ V ≤ 5.5V kHz CC 4.5V ≤ V ≤ 5.5V CC 2.5V ≤ V ≤ 5. 4.5V ≤ V ≤ 5.5V CC 2.5V ≤ V ≤ 5. 4.5V ≤ V ≤ ...

Page 4

... FUNCTIONAL DESCRIPTION The 24LCS22A is designed to comply to the DDC Standard proposed by VESA (Figure 3-3) with the exception that it is not Access.bus™ capable. It oper- ates in two modes, the Transmit-Only mode (1 Kbit) and the Bidirectional mode (2 Kbit). There is a separate 2-wire protocol to support each mode, each having a separate clock input but sharing a common data line (SDA) ...

Page 5

... Bidirectional mode clock (SCL), controls access to the bus and generates the Start and Stop conditions, while the 24LCS22A acts as the slave. Both master and slave can operate as transmitter or receiver, but the master device determines which mode is activated. In the Bidirectional mode, the 24LCS22A only responds to commands for device ‘ ...

Page 6

... VESA’s Display Data Channel (DDC) Standard Proposal ver. 2p rev. 0, used by permission of VESA. 2: The dash box and text “The 24LCS22A and... inside dash box.” are added by Microchip Technology Inc. 3: Vsync signal is normally used to derive a signal for VCLK pin on the 24LCS22A. ...

Page 7

... Note: Once switched into Bidirectional mode, the 24LCS22A will remain in that mode until power is removed. Removing power is the only way to reset the 24LCS22A into the Transmit-Only mode. 3.1.5 ACKNOWLEDGE Each receiving device, when addressed, is obliged to generate an acknowledge after the reception of each byte ...

Page 8

... After generating a Start condition, the bus master transmits the slave address consisting of a 7-bit device code (1010000) for the 24LCS22A. The eighth bit of slave address determines whether the master device wants to read or write to the 24LCS22A (Figure 3-7). The 24LCS22A monitors the bus for its corresponding slave address continuously ...

Page 9

... Page Write The write control byte, word address and the first data byte are transmitted to the 24LCS22A in the same way byte write. But instead of generating a Stop condition the master transmits up to eight data bytes to the 24LCS22A which are temporarily stored in the on- chip page buffer and will be written into the memory after the master has transmitted a Stop condition ...

Page 10

... FIGURE 4-1: BYTE WRITE Bus Activity R Master T SDA Line S Bus Activity VCLK FIGURE 4-2: VCLK WRITE ENABLE TIMING SCL SDA IN VCLK T VHST DS21682E-page 10 Word Control Address Byte STA SU STO S T Data SPVL © 2009 Microchip Technology Inc. ...

Page 11

... Bus Activity K VCLK © 2009 Microchip Technology Inc. FIGURE 5-1: Write Command Initiate Write Cycle Send Control Byte Word Data Address Data ( 24LCS22A ACKNOWLEDGE POLLING FLOW Send Send Stop Condition to Send Start with R Did Device Acknowledge (ACK = 0)? Yes Next Operation Data ...

Page 12

... Address Pointer is set. Then the master issues the control byte again but with the R/W bit set to a one. The 24LCS22A will then issue an acknowledge and transmits the 8-bit data word. The master will not acknowledge the transfer, but does generate a Stop condition and the 24LCS22A discontinues transmission (Figure 7-2) ...

Page 13

... Sequential Read Sequential reads are initiated in the same way as a random read except that after the 24LCS22A transmits the first data byte, the master issues an acknowledge as opposed to a Stop condition in a random read. This directs the 24LCS22A to transmit the next sequentially addressed 8-bit word (Figure 7-3) ...

Page 14

... Internal Connection 8.1 Write-Protect (WP) This pin is used for flexible write protection of the 24LCS22A. When memory location 7Fh is written with any data, this pin is enabled and determines the write capability of the 24LCS22A (Table 6-1). 8.2 Serial Address/Data Input/Output (SDA) This pin is used to transfer addresses and data into and out of the device, when the device is in the Bidirectional mode ...

Page 15

... Standard marking consists of Microchip part number, year code, week code, traceability code (facility code, mask rev#, and assembly code). © 2009 Microchip Technology Inc. 24LCS22A Example: 24LCS22A e I/P NNN 3 0145 Example: 4LCS22AI ...

Page 16

... DS21682E-page 16 PLO %RG\ >3',3@ © 2009 Microchip Technology Inc. ...

Page 17

... Microchip Technology Inc. 24LCS22A PP %RG\ >62,&@ α φ β DS21682E-page 17 ...

Page 18

... DS21682E-page 18 PP %RG\ >62,&@ © 2009 Microchip Technology Inc. ...

Page 19

... REVISION HISTORY Revision B Corrections to Section 1.0, Electrical Characteristics. Revision C Revised Section 8.1. Added new package legend. Revision D (07/2008) Revised Features (added Pb-free); Replaced Package Drawings (Rev. AP); Revised Product ID System. Revision E (06/2009) Revised Package Marking examples. © 2009 Microchip Technology Inc. 24LCS22A DS21682E-page 19 ...

Page 20

... NOTES: DS21682E-page 20 © 2009 Microchip Technology Inc. ...

Page 21

... Customers representative or field application engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://support.microchip.com 24LCS22A should contact their distributor, DS21682E-page 21 ...

Page 22

... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: 24LCS22A Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this document easy to follow? If not, why? 4 ...

Page 23

... Package Plastic DIP (300 mil Body), 8-Lead SN = Plastic SOIC (3.90 mm Body), 8-Lead © 2009 Microchip Technology Inc. 24LCS22A . Examples: a) 24LCS22A-I/P: Industrial temperature, PDIP package. b) 24LCS22A-I/SN: Industrial temperature, SOIC package. c) 24LCS22AT-I/SN:Tape and Reel, Industrial temperature, SOIC package. DS21682E-page 23 ...

Page 24

... NOTES: DS21682E-page 24 © 2009 Microchip Technology Inc. ...

Page 25

... PICDEM, PICDEM.net, PICtail, PIC Select Mode, Total Endurance, TSHARC, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 26

... Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2009 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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