AD9508/PCBZ Analog Devices, AD9508/PCBZ Datasheet - Page 19

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AD9508/PCBZ

Manufacturer Part Number
AD9508/PCBZ
Description
Clock & Timer Development Tools 1
Manufacturer
Analog Devices
Type
Clock Buffersr
Datasheet

Specifications of AD9508/PCBZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
AD9508
Frequency
250 MHz, 1.65 GHz
Operating Supply Voltage
6 V
Description/function
High performance 1
Interface Type
I2C, SPI, USB
Factory Pack Quantity
1
Data Sheet
TEST CIRCUITS
INPUT/OUTPUT TERMINATION RECOMMENDATIONS
Figure 34. Typical AC-Coupled or DC-Coupled LVDS or HSTL Configurations
Figure 36. Typical AC-Coupled or DC-Coupled LVPECL Configurations
Figure 37. Typical 1.8 V CMOS Configurations for Short Trace Lengths
Figure 35. Typical AC-Coupled or DC-Coupled CML Configurations
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
50Ω
50Ω
CLK
CLK
100Ω
50Ω
50Ω
V
V
V
V
CC
CC
CC
CC
– 2V
– 2V
AD9508
AD9508
AD9508
AD9508
AD9508
AD9508
AD9508
Rev. A | Page 19 of 40
Figure 40. Interfacing the HSTL Driver to a 3.3 V LVPECL Input (This method
Figure 38. AC-Coupled LVDS or HSTL Output Driver (100 Ω Resistor Can Go
on Either Side of Decoupling Capacitors Placed As Close As Possible To The
receivers. If the receiver is self-biased, the termination scheme shown in
incorporates impedance matching and dc biasing for bipolar LVPECL
HSTL OR
LVDS
1.8V
HSTL
AD9508
AD9508
HSTL OR
LVDS
AD9508
Figure 39. DC-Coupled LVDS or HSTL Output Driver
0.1µF
0.1µF
SINGLE-ENDED
(NOT COUPLED)
Figure 38 is recommended.)
(NOT COUPLED)
SINGLE-ENDED
Destination Receiver)
100Ω
Z
Z
Z
Z
0
0
0
0
= 50Ω
= 50Ω
= 50Ω
= 50Ω
100Ω
0.1µF
0.1µF
127Ω
82Ω
V
S
= 3.3V
DOWNSTREAM
IMPEDANCE
LVDS OR 1.8V HSTL
INPUT AND
WITH HIGH
INTERNAL
HIGH-IMPEDANCE
DC-BIAS
DEVICE
82Ω
127Ω
DIFFERENTIAL
RECEIVER
LVPECL
AD9508
3.3V

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