AD9508/PCBZ Analog Devices, AD9508/PCBZ Datasheet - Page 5

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AD9508/PCBZ

Manufacturer Part Number
AD9508/PCBZ
Description
Clock & Timer Development Tools 1
Manufacturer
Analog Devices
Type
Clock Buffersr
Datasheet

Specifications of AD9508/PCBZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
AD9508
Frequency
250 MHz, 1.65 GHz
Operating Supply Voltage
6 V
Description/function
High performance 1
Interface Type
I2C, SPI, USB
Factory Pack Quantity
1
Data Sheet
Parameter
CMOS CLOCK OUTPUTS
OUTPUT DRIVER TIMING CHARACTERISTICS
Table 3.
Parameter
LVDS OUTPUTS
HSTL OUTPUTS
CMOS OUTPUTS
Output Frequency
Output Voltage
CMOS Duty Cycle
Output Rise/Fall Time
Propagation Delay, Clock-to-LVDS Output
Output Skew
Output Rise/Fall Time
Propagation Delay, Clock-to-HSTL Output
Output Skew
Output Rise/Fall Time
Propagation Delay, Clock-to-CMOS Output
Output Skew
@ 1 mA Load
@ 10 mA load
@ 10 mA Load (2 × CMOS Mode)
Temperature Coefficient
All LVDS Outputs
Temperature Coefficient
All HSTL Outputs
Temperature Coefficient
All CMOS Outputs
High
Low
High
Low
High
Low
On the Same Part
Across Multiple Parts
On the Same Part
Across Multiple Parts
On the Same Part
Across Multiple Parts
1
1
1
Symbol
V
V
V
V
V
V
OH
OL
OH
OL
OH
OL
Min
1.7
1.2
1.45
45
Symbol
t
t
t
t
t
t
R
PD
R
PD
R,
PD
, t
, t
t
F
F
F
Rev. A | Page 5 of 40
Min
1.56
1.59
2.04
Typ
Typ
152
2.01
2.8
118
2.05
2.9
1.18
2.56
3.3
Max
250
0.1
0.6
0.35
55
Max
177
2.43
781
143
2.5
59
825
1.45
3.07
112
965
48
Unit
ps
ns
ps/°C
ps
ps
ps
ns
ps/°C
ps
ps
ns
ns
ps/°C
ps
ps
Unit
MHz
V
V
V
V
V
V
%
Test Conditions/Comments
Termination = 100 Ω differential, 1 × LVDS
20% to 80% measured differentially
Assumes same temperature and supply;
takes into account worst-case propaga-
tion delay delta due to worst-case
process variation
Termination = 100 Ω differential, 1 × HSTL
20% to 80% measured differentially
Assumes same temperature and supply;
takes into account worst-case propaga-
tion delay delta due to worst-case
process variation
20% to 80%; C
10 pF load
Assumes same temperature and supply;
takes into account worst-case
propagation delay delta due to worst-
case process variation
Test Conditions/Comments
Single-ended; termination = open; OUTx
and OUTx in phase
With 10 pF load per output, see Figure 14
for swing vs. frequency
Up to 250 MHz
LOAD
= 10 pF
AD9508

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