IC EEPROM 256KBIT 200NS 32PLCC

AT28BV256-20JU

Manufacturer Part NumberAT28BV256-20JU
DescriptionIC EEPROM 256KBIT 200NS 32PLCC
ManufacturerAtmel
AT28BV256-20JU datasheet
 


Specifications of AT28BV256-20JU

Format - MemoryEEPROMs - ParallelMemory TypeEEPROM
Memory Size256K (32K x 8)Speed200ns
InterfaceParallelVoltage - Supply2.7 V ~ 3.6 V
Operating Temperature-40°C ~ 85°CPackage / Case32-PLCC
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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Features
Single 2.7V - 3.6V Supply
Fast Read Access Time – 200 ns
Automatic Page Write Operation
– Internal Address and Data Latches for 64 Bytes
– Internal Control Timer
Fast Write Cycle Times
– Page Write Cycle Time: 10 ms Maximum
– 1- to 64-byte Page Write Operation
Low Power Dissipation
– 15 mA Active Current
– 20 µA CMOS Standby Current
Hardware and Software Data Protection
Data Polling for End of Write Detection
High Reliability CMOS Technology
– Endurance: 10,000 Cycles
– Data Retention: 10 Years
JEDEC Approved Byte-wide Pinout
Industrial Temperature Ranges
Green (Pb/Halide-free) Packaging Option Only
1. Description
The AT28BV256 is a high-performance electrically erasable and programmable read-
only memory. Its 256K of memory is organized as 32,768 words by 8 bits. Manufac-
tured with Atmel’s advanced nonvolatile CMOS technology, the device offers access
times to 200 ns with power dissipation of just 54 mW. When the device is deselected,
the CMOS standby current is less than 200 µA.
The AT28BV256 is accessed like a Static RAM for the read or write cycle without the
need for external components. The device contains a 64-byte page register to allow
writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to
64 bytes of data are internally latched, freeing the address and data bus for other
operations. Following the initiation of a write cycle, the device will automatically write
the latched data using an internal control timer. The end of a write cycle can be
detected by Data polling of I/O7. Once the end of a write cycle has been detected a
new access for a read or write can begin.
Atmel’s AT28BV256 has additional features to ensure high quality and manufactura-
bility. The device utilizes internal error correction for extended endurance and
improved data retention characteristics. An optional software data protection mecha-
nism is available to guard against inadvertent writes. The device also includes an
extra 64 bytes of EEPROM for device identification or tracking.
256K (32K x 8)
Battery-Voltage
Parallel
EEPROMs
AT28BV256
0273K–PEEPR–2/09

AT28BV256-20JU Summary of contents

  • Page 1

    ... When the device is deselected, the CMOS standby current is less than 200 µA. The AT28BV256 is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 64-byte page register to allow writing bytes simultaneously ...

  • Page 2

    ... No Connect DC Don’t Connect 2.1 32-lead PLCC – Top View I/O0 13 Note: 1. PLCC package pins 1 and 17 are Don’t Connect. AT28BV256 2 2.2 28-lead SOIC – Top View 2.3 28-lead TSOP – Top View OE A11 A13 27 A11 WE VCC 26 NC A14 25 OE A12 ...

  • Page 3

    ... This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect + 0.6V device reliability CC AT28BV256 3 ...

  • Page 4

    ... Read The AT28BV256 is accessed like a Static RAM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state when either high. This dual-line control gives designers flexibility in preventing bus contention in their system ...

  • Page 5

    ... SDP can prevent inadvertent writes during power-up and power-down as well as any other potential periods of system instability. The AT28BV256 can only be written using the software data protection feature. A series of three write commands to specific addresses with specific data must be presented to the device before writing in the byte or page mode ...

  • Page 6

    ... IH V Output Low Voltage OL V Output High Voltage OH AT28BV256 ( ( Condition I 0. MHz OUT -100 µA OH AT28BV256-20 -40°C - 85°C 2.7V - 3. OUT High High Z V High Z IL Min Max Units 10 µA 10 µA 50 µ 0.6 V 2.0 V 0.3 V 2.0 V 0273K–PEEPR–2/09 ...

  • Page 7

    ... whichever occurs first ( This parameter is characterized and is not 100% tested. 0273K–PEEPR–2/09 (1)(2)(3)( ACC - t after the address transition without impact on t ACC after the falling edge of CE without impact pF). L AT28BV256 AT28BV256-20 Min Max Units 200 ns 200 ACC ...

  • Page 8

    ... Input Test Waveforms and Measurement Level 12. Output Test Load 13. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. AT28BV256 < Max 6 12 Units Conditions OUT 0273K–PEEPR–2/09 ...

  • Page 9

    ... Chip Select Hold Time CH t Write Pulse Width ( Data Set-up Time Data, OE Hold Time DH OEH t Time to Data Valid DV Note Restriction. 15. AC Write Waveforms 15.1 WE Controlled 15.2 CE Controlled 0273K–PEEPR–2/09 t OES t OEH OES OEH AT28BV256 Min Max 200 WPH WPH t DH Units ...

  • Page 10

    ... A0 - A14 must conform to the addressing sequence for the first three bytes as shown above through A14 must specify the same page address during each high to low transition of WE (or CE) after the software code has been entered must be high only when WE and CE are both low. AT28BV256 10 (1)(2)(3) LOAD DATA AA ...

  • Page 11

    ... Toggling either both OE and CE will operate toggle bit. 2. Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. 0273K–PEEPR–2/09 ( OEH OEH AT28BV256 Min Typ Max Min Typ Max 10 10 150 ...

  • Page 12

    ... Normalized I Graphs CC AT28BV256 12 0273K–PEEPR–2/09 ...

  • Page 13

    ... Wide, Plastic Gull Wing Small Outline (SOIC) 28T 28-lead, Plastic Thin Small Outline Package (TSOP) 24.2 Die Products Contact Atmel Sales for die sales options. 0273K–PEEPR–2/09 Ordering Code AT28BV256-20JU AT28BV256-20SU AT28BV256-20TU Package Type AT28BV256 Package Operation Range 32J ...

  • Page 14

    ... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT28BV256 14 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER E1 E ...

  • Page 15

    ... PIN 1 1.27(0.50) BSC TOP VIEW 18.10(0.7125) 17.70(0.6969) 0.30(0.0118) 0.10(0.0040) 0º ~ 8º 1.27(0.050) 0.40(0.016) TITLE 28S, 28-lead, 0.300" Body, Plastic Gull Wing Small Outline (SOIC) JEDEC Standard MS-013 AT28BV256 10.65(0.419) 10.00(0.394) 2.65(0.1043) 2.35(0.0926) SIDE VIEWS 0.32(0.0125) 0.23(0.0091) DRAWING NO. 28S 8/4/03 REV ...

  • Page 16

    ... E Notes: 1. This package conforms to JEDEC reference MO-183. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT28BV256 16 PIN SEATING PLANE A1 TITLE 28T, 28-lead (8 x 13.4 mm) Plastic Thin Small Outline Package, Type I (TSOP) 0º ...

  • Page 17

    ... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...