AD6643-250EBZ Analog Devices, AD6643-250EBZ Datasheet - Page 10

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AD6643-250EBZ

Manufacturer Part Number
AD6643-250EBZ
Description
Data Conversion IC Development Tools 11 Bit Dual IF Diversity 3G Receiver
Manufacturer
Analog Devices
Type
ADCr
Series
AD6643r
Datasheet

Specifications of AD6643-250EBZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
AD6643-250
Interface Type
SPI, USB
Operating Supply Voltage
6 V
Description/function
250 MSPs per channel dual IF receiver
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Current
2 A
Factory Pack Quantity
1
For Use With
HSC-ADC-EVALCZ
AD6643
ABSOLUTE MAXIMUM RATINGS
Table 6.
Parameter
Electrical
Environmental
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
AVDD to AGND
DRVDD to AGND
VIN+A/VIN+B, VIN−A/VIN−B to AGND
CLK+, CLK− to AGND
SYNC to AGND
VCM to AGND
CSB to AGND
SCLK to AGND
SDIO to AGND
OEB to AGND
PDWN to AGND
OR+/OR− to AGND
DCO+/DCO− to AGND
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
D0−/D0+ Through D10−/D10+
(Ambient)
Under Bias
(Ambient)
to AGND
Rating
−0.3 V to +2.0 V
−0.3 V to +2.0 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to AVDD + 0.2 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−0.3 V to DRVDD + 0.3 V
−40°C to +85°C
150°C
−65°C to +125°C
Rev. C | Page 10 of 40
THERMAL CHARACTERISTICS
The exposed paddle must be soldered to the ground plane for
the LFCSP package. Soldering the exposed paddle to the printed
circuit board (PCB) increases the reliability of the solder joints,
maximizing the thermal capability of the package.
Typical θ
plane. As listed in Table 7, airflow increases heat dissipation,
which reduces θ
package leads from metal traces, through holes, ground, and
power planes, reduces the θ
Table 7. Thermal Resistance
Package Type
64-Lead LFCSP
1
2
3
4
ESD CAUTION
Per JEDEC 51-7, plus JEDEC 25-5 2S2P test board.
Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air).
Per MIL-Std 883, Method 1012.1.
Per JEDEC JESD51-8 (still air).
9 mm × 9 mm
(CP-64-4)
JA
is specified for a 4-layer PCB that uses a solid ground
JA
. In addition, metal in direct contact with the
Airflow
Velocity
(m/sec)
0
1.0
2.0
JA
.
θ
26.8
21.6
20.2
JA
1, 2
θ
1.14
JC
1, 3
Data Sheet
θ
10.4
JB
1, 4
Unit
°C/W
°C/W
°C/W

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