AD9634-210EBZ Analog Devices, AD9634-210EBZ Datasheet - Page 13

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AD9634-210EBZ

Manufacturer Part Number
AD9634-210EBZ
Description
Data Conversion IC Development Tools 12 Bit 210 Msps ADC
Manufacturer
Analog Devices
Type
ADCr
Series
AD9634r
Datasheet

Specifications of AD9634-210EBZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
AD9634-210
Interface Type
SPI, USB
Operating Supply Voltage
6 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Operating Supply Current
2 A
Factory Pack Quantity
1
For Use With
HSC-ADC-EVALCZ
Evaluation Board User Guide
5.
6.
7.
8.
Configure the settings in the FFT analysis to match the
settings selected for the NSR in the SPI controller (see
Figure 17).
The result should show an FFT plot that looks similar to
Figure 18.
The amplitude shows approximately 0.6 dB lower than
when the NSR is disabled. The NSR circuitry introduces
this loss. An amplitude of −1.6 dBFS with NSR enabled
is analogous to an amplitude of −1.0 dBFS with NSR
disabled.
Repeat Step 3 to save the graph in a .csv file format.
Figure 18. Graph Window of VisualAnalog, NSR Enabled,
Figure 17. VisualAnalog, FFT Analysis Settings for
AD6672
AD6672
Rev. 0 | Page 13 of 28
Troubleshooting Tips
If the FFT plot appears abnormal, do the following:
If the FFT appears normal but the performance is poor, check
the following:
If the FFT window remains blank after Run (see Figure 13) is
clicked, do the following:
If VisualAnalog indicates that the data capture timed out, do the
following:
If you see a normal noise floor when you disconnect the
signal generator from the analog input, be sure that you
are not overdriving the ADC. Reduce the input level if
necessary.
In VisualAnalog, click the Settings button in the Input
Formatter block (see Figure 7). Check that Number
Format in the settings of the Input Formatter block is set
to the correct encoding (offset binary by default). Repeat
for the other channel.
Make sure that an appropriate filter is used on the
analog input.
Make sure that the signal generators for the clock and the
analog input are clean (low phase noise).
Change the analog input frequency slightly if noncoherent
sampling is being used.
Make sure that the SPI configuration file matches the
product being evaluated.
Make sure that the evaluation board is securely connected
to the
Make sure that the FPGA has been programmed by
verifying that the DONE LED is illuminated on the
ADC-EVALCZ
sure that the U4 switch on the board is in the correct
position for USB CONFIG.
Make sure that the correct FPGA program was installed by
clicking the Settings button in the ADC Data Capture
block in VisualAnalog. Then select the FPGA tab and
verify that the proper FPGA bin file is selected for the part.
Make sure that all power and USB connections are secure.
Probe the DCO signal at the ADC on the evaluation board
and confirm that a clock signal is present at the ADC
sampling rate.
HSC-ADC-EVALCZ
board. If this LED is not illuminated, make
board.
UG-386
HSC-

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