S-93C66BD0I-T8T1G Seiko Instruments, S-93C66BD0I-T8T1G Datasheet
S-93C66BD0I-T8T1G
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S-93C66BD0I-T8T1G Summary of contents
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... Seiko Instruments Inc., 2002-2010 The S-93C46B/56B/66B is a 3-wire, high speed, low current consumption, 1/2/4 K-bit serial E operating voltage range organized as 64-word × 16-bit, 128-word × 16-bit, 256-word × 16-bit, respectively. Each is capable of sequential read, at which time addresses are automatically incremented in 16-bit blocks. ...
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... S-93C56BD0I-J8T1x S-93C66BD0I-J8T1x 2 Table 1 Pin No. Symbol GND *1 TEST VCC *1. Connect to GND Even if this pin is not connected, performance is not affected so long as the absolute maximum rating is not exceeded. Table 2 Pin No. Symbol GND *1 TEST VCC *1. Connect to GND Even if this pin is not connected, performance is not affected so long as the absolute maximum rating is not exceeded ...
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... GND *1 6 TEST VCC *1. Connect to GND Even if this pin is not connected, performance is not affected so long as the absolute maximum rating is not exceeded. Seiko Instruments Inc. 2 3-WIRE SERIAL E PROM S-93C46B/56B/66B Description No connection Power supply Chip select input Serial clock input Serial data input ...
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... TMSOP-8 Top view Figure 6 S-93C46BD0I-K8T3U S-93C56BD0I-K8T3U S-93C66BD0I-K8T3U Remark 1. See Dimensions for details of the package drawings Please select products of environmental code = U for Sn 100%, halogen-free products. 4 Pin No. Symbol GND 6 TEST VCC *1. Connect to GND or V Even if this pin is not connected, performance is not affected so long as the absolute maximum rating is not exceeded ...
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... Rev.7.0 _00 Block Diagram Address Memory array decoder Data register Mode decode logic Clock pulse Voltage detector monitoring circuit Clock generator Figure 7 Seiko Instruments Inc. 2 3-WIRE SERIAL E PROM S-93C46B/56B/66B VCC GND Output buffer DO 5 ...
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... ERAL (Erase all) 1 EWEN (Write enable) 1 EWDS (Write disable) 1 *1. When the 16-bit data in the specified address has been output, the data in the next address is output. Remark x: Don’t care 2. S-93C56B Instruction Start Bit SK input clock READ (Read data) WRITE (Write data) ...
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... Input voltage Output voltage Operating ambient temperature Storage temperature Caution The absolute maximum ratings are rated values exceeding which the product could suffer physical damage. These values must therefore not be exceeded under any conditions. Recommended Operating Conditions Item Power supply voltage ...
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... A − 0 − 10 μ A − 0 Only when write 1.5 disable mode Seiko Instruments Inc. Rev.7.0 (Ta = − ° C unless otherwise specified) = 2 1 Min. Max. Min. Max. ⎯ ⎯ 0.5 0.4 (Ta = − ° C unless otherwise specified) = 2 Max. ...
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... SK clock time “H” Output disable time Output enable time *1. The clock cycle of the SK clock (frequency: f combination of several AC characteristics aware that even if the SK clock cycle time is minimized, the clock cycle (1/f ) cannot be made equal Item Write time Table 18 Measurement Conditions 0.1 × ...
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... CSS Valid data *1 High (READ) High-Z DO (VERIFY) *1. Indicates high impedance. *2. 1/f is the SK clock cycle. This clock cycle is determined by a combination of several AC characteristics aware that even if the SK clock cycle time is minimized, the clock cycle (1/f (Min (Min.). SKL SKH SKH SKL t t ...
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... While a low level is being input to CS, the S-93C46B/56B/66B is in standby mode, so the SK and DI inputs are invalid and no instructions are allowed. Start Bit A start bit is recognized when the DI pin goes high at the rise of SK after CS goes high. After CS goes high, a start bit is not recognized even if the SK pulse is input as long as the DI pin is low. 1. Dummy clock SK clocks input while the DI pin is low before a start bit is input are called dummy clocks ...
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... After CS has gone high, input an instruction in the order of the start bit, read instruction, and address. Since the last input address (A 0 (High-Z) to low, which is held until the next rise of SK. 16-bit data starts to be output in synchronization with the next rise of SK Sequential read After the 16-bit data at the specified address has been output, inputting SK while CS is high automatically increments the address, and causes the 16-bit data at the next address to be output sequentially ...
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... Caution 1. Input a low level to the DI pin during a verify operation high level is input to the DI pin at the rise of SK when the output status of the DO pin is high, the S-93C46B/56B/66B latches the instruction assuming that a start bit has been input. ...
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... The write operation starts when CS goes low. There is no need to set the data to 1 before writing. If the clocks more than the specified number have been input, the clock pulse monitoring circuit cancels the WRITE instruction. For details of the clock pulse monitoring circuit, refer to “ ...
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... Erasing data (ERASE) To erase 16-bit data at a specified address, set all 16 bits of the data to 1, change CS to high, and then input the ERASE instruction and address following the start bit. There is no need to input data. The data erase operation starts when CS goes low. If the clocks more than the specified number have been input, the clock pulse monitoring circuit cancels the ERASE instruction. For details of the clock pulse monitoring circuit, refer to “ ...
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... WRAL instruction, an address, and 16-bit data following the start bit. Any address can be input. The write operation starts when CS goes low. There is no need to set the data to 1 before writing. If the clocks more than the specified number have been input, the clock pulse monitoring circuit cancels the WRAL instruction. For details of the clock pulse monitoring circuit, refer to “ ...
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... Erasing chip (ERAL) To erase the data of the entire memory address space, set all the data to 1, change CS to high, and then input the ERAL instruction and an address following the start bit. Any address can be input. There is no need to input data. The chips erase operation starts when CS goes low. If the clocks more than the specified number have been input, the clock pulse monitoring circuit cancels the ERAL instruction. For details of the clock pulse monitoring circuit, refer to “ ...
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... The EWDS instruction is an instruction that disables a write operation. The status in which a write operation is disabled is called the program disable mode. After CS goes high, input an instruction in the order of the start bit, EWEN or EWDS instruction, and address (optional). Each mode becomes valid by inputting a low level to CS after the last address (optional) has been input ...
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... ERASE, WRAL, and ERAL) are cancelled, and the write disable state (EWDS) is automatically set. The detection voltage is 1.75 V typ., the release voltage is 2.05 V typ., and there is a hysteresis of about 0.3 V (refer to Figure 21 ). Therefore, when a write operation is performed after the power supply voltage has dropped and then risen again up to the level at which writing is possible, a write enable instruction (EWEN) must be sent before a write instruction (WRITE, ERASE, WRAL, or ERAL) is executed ...
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... ERASE, WRAL, and ERAL) recognized erroneously due to an erroneous clock count caused by the application of noise pulses or double counting of clocks. Instructions are cancelled if a clock pulse more or less than specified number decided by each write operation (WRITE, ERASE, WRAL, or ERAL) is detected. ...
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... DI input pin and DO output pin. When the 3-wire interface is employed, a period in which the data output from the CPU and the data output from the serial memory collide may occur, causing a malfunction. To prevent such a malfunction, connect the DI and DO pins of the S-93C46B/56B/66B via a resistor (10 to 100 k in being input to the DI pin (refer to “ ...
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... SERIAL E PROM S-93C46B/56B/66B 2. 1 Input pin CS SK, DI TEST 22 Figure 24 CS Pin Figure 25 SK, DI Pin Figure 26 TEST Pin Seiko Instruments Inc. Rev.7.0 _00 ...
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... Input pin noise elimination time The S-93C46B/56B/66B include a built-in low-pass filter to eliminate noise at the SK, DI, and CS pins. This means that if the supply voltage is 5.0 V (at room temperature), noise with a pulse width less can be eliminated. Note, therefore, the noise with a pulse width of more than 20 ns will be recognized as a pulse if the voltage ...
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... Current consumption (READ) I vs. power supply voltage 25°C = 100 kHz, 10 kHz f SK DATA = 0101 0.4 I CC1 (mA) 100 kHz 0.2 10 kHz Current consumption (READ) I CC1 Current consumption (READ) I CC1 Current consumption (READ) I CC1 (V) Seiko Instruments Inc. Rev.7.0 CC1 vs. ambient temperature 500 kHz f ...
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... CC2 (mA) 0.5 0 − (° Current consumption (WRITE) I vs. ambient temperature 1.0 I CC2 (mA) 0.5 0 − (° Current consumption in standby mode I vs. ambient temperature GND 1 (μA) 0.5 0 − (° Current consumption (WRITE) I CC2 vs. ambient temperature Current consumption (WRITE) I CC2 vs. power supply voltage ...
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... −400 μ 4.6 V 4.4 OH (V) 4.2 − (° Input leakage current Output leakage current High-level output voltage Seiko Instruments Inc. Rev.7.0 LI vs. ambient temperature CS, SK, DI, TEST = 5 (μA) 0.5 0 − (°C) LO vs. ambient temperature 5 (μA) 0.5 0 − ...
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... Rev.7.0 _00 1. 19 High-level output voltage V vs. ambient temperature −100 μ 2.5 V 2.4 OH (V) 2.3 − (° Low-level output voltage V vs. ambient temperature 0.3 V 0.2 OL (V) 0.1 − (° High-level output current I vs. ambient temperature −20 (mA) −10.0 0 − (° ...
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... V OH − (mA) −1 0 − (° Low-level output current I vs. ambient temperature (mA − ° Input inverted voltage V vs. power supply voltage 25°C CS, SK, DI 3.0 V INV ( High-level output current Low-level output current Input inverted voltage V INV Seiko Instruments Inc. Rev.7 ...
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... Rev.7.0 _00 1. 31 Low supply voltage detection voltage vs. ambient temperature Ta 2.0 −V DET (V) 1.0 0 − (°C) − Low supply voltage release voltage +V V DET vs. ambient temperature Ta 85 Seiko Instruments Inc. 2 3-WIRE SERIAL E PROM S-93C46B/56B/66B DET 2.0 +V DET (V) 1.0 0 − (°C) 29 ...
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... SERIAL E PROM S-93C46B/56B/66B 2. AC Characteristics 2. 1 Maximum operating frequency f vs. power supply voltage 25° MAX. (Hz) 100k 10k Write time t PR vs. ambient temperature (ms − (° Write time t PR vs. ambient temperature (ms − (° Write time t MAX ( Write time Data output delay time t 85 Seiko Instruments Inc ...
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... Rev.7.0 _00 2. 7 Data output delay time t PD vs. ambient temperature (μs) 0.4 0.2 − (° Data output delay time t vs. ambient temperature Ta 85 Seiko Instruments Inc. 2 3-WIRE SERIAL E PROM S-93C46B/56B/66B (μs) 1.0 0.5 − (°C) 31 ...
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... S-93CxxB xxxx TMSOP-8 S-93CxxB K8T3 U 32 Environmental code U: Lead-free (Sn 100%), halogen-free G: Lead-free (for details, please contact our sales office) Package name (abbreviation) and IC packing specifications J8T1: 8-Pin SOP(JEDEC), Tape T8T1: 8-Pin TSSOP, Tape I8T1: SNT-8A, Tape Operation temperature −40 to +85°C ...
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... Environmental code = U Environmental code = G 8-Pin TSSOP Environmental code = U SNT-8A TMSOP-8 Environmental code G: Lead-free (for details, please contact our sales office) Package name (abbreviation) and IC packing specifications D8S1: 8-Pin DIP, Tube Operation temperature −40 to +85°C I: Fixed Product name S-93C46B : 1 K-bit ...
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... Seiko Instruments Inc. is strictly prohibited. • The products described herein cannot be used as part of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of Seiko Instruments Inc. ...