PCF85102C-2T/03,11 NXP Semiconductors, PCF85102C-2T/03,11 Datasheet

IC EEPROM 2KBIT 100KHZ 8SOIC

PCF85102C-2T/03,11

Manufacturer Part Number
PCF85102C-2T/03,11
Description
IC EEPROM 2KBIT 100KHZ 8SOIC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCF85102C-2T/03,11

Memory Size
2K (256 x 8)
Package / Case
8-SOIC (3.9mm Width)
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Speed
100kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
2.5 V ~ 6.0 V
Operating Temperature
-40°C ~ 85°C
Organization
256 K x 8
Interface Type
I2C
Maximum Clock Frequency
0.1 MHz
Supply Voltage (max)
6 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
2 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
3.3 V, 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935262037118
PCF85102C2D-T
PCF85102C2D-T
1. Description
2. Features
The PCF85102C-2 is a floating gate Electrically Erasable Programmable Read Only
Memory (EEPROM) with 2 kbits (256
internal redundant storage code, it is fault tolerant to single bit errors. This feature
dramatically increases the reliability compared to conventional EEPROMs. Power
consumption is low due to the full CMOS technology used. The programming voltage
is generated on-chip, using a voltage multiplier.
Data bytes are received and transmitted via the serial I
PCF85102C-2 devices may be connected to the I
by three address inputs (A0, A1 and A2).
PCF85102C-2
256
Rev. 04 — 22 October 2004
Low power CMOS:
Non-volatile storage of 2 kbits organized as 256
Single supply with full operation down to 2.5 V
On-chip voltage multiplier
Serial input/output I
Write operations:
Read operations:
Internal timer for writing (no external components)
Internal power-on reset
0 kHz to 100 kHz clock frequency
High reliability by using a redundant storage code
Endurance: 1,000,000 Erase/Write (E/W) cycles at T
10 years non-volatile data retention time
Pin and address compatible to: PCF8570, PCF8571, PCF8572, PCA8581,
PCF8582
Pin compatible (with a different address) to PCF85103
ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
2.0 mA maximum operating current
maximum standby current 10 A (at 6.0 V), typical 4 A
byte write mode
8-byte page write mode (minimizes total write time per byte)
sequential read
random read
8-bit CMOS EEPROM with I
2
C-bus
8-bit) non-volatile storage. By using an
2
2
C-bus interface
C-bus. Chip select is accomplished
8-bit
2
C-bus. Up to eight
amb
= 22 C
Product data

Related parts for PCF85102C-2T/03,11

PCF85102C-2T/03,11 Summary of contents

Page 1

... PCF85102C-2 256 Rev. 04 — 22 October 2004 1. Description The PCF85102C floating gate Electrically Erasable Programmable Read Only Memory (EEPROM) with 2 kbits (256 internal redundant storage code fault tolerant to single bit errors. This feature dramatically increases the reliability compared to conventional EEPROMs. Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier ...

Page 2

... Ordering information Package Name Description DIP8 plastic dual in-line package; 8 leads (300 mil) SO8 plastic small outline package 8 leads (straight); body width 3.9 mm Ordering options Topside mark PCF85102C2 85102C2 Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface Min Typ Max Unit 2 ...

Page 3

... PCF85102C-2 6 SCL INPUT 5 FILTER SDA n ADDRESS SHIFT SWITCH REGISTER TEST MODE DECODER POWER-ON-RESET Fig 1. Block diagram C-BUS CONTROL LOGIC ADDRESS BYTE HIGH COUNTER REGISTER 3 BYTE 4 ADDRESS LATCH EEPROM 8 POINTER (8 bytes) DIVIDER ...

Page 4

... The Most Significant Bit (MSB) ‘b7’ is sent first. A2, A1, A0 are hardware selectable pins. A system could have up to eight PCF85102C-2 devices on the same I equivalent kbit EEPROM or 8 pages of 256 bytes of memory. The eight addresses are defined by the state of the A0, A1, A2 inputs (logic level ‘1’ ...

Page 5

... PCF85102C-2 DEVICE C-BUS 256-BYTE PAGE PCF85102C-2 DEVICE 2 256-BYTE PAGE PCF85102C-2 DEVICE 3 256-BYTE PAGE PCF85102C-2 DEVICE 4 256-BYTE PAGE PCF85102C-2 DEVICE 5 256-BYTE PAGE PCF85102C-2 DEVICE 6 256-BYTE PAGE PCF85102C-2 DEVICE 7 256-BYTE PAGE PCF85102C-2 DEVICE 8 256-BYTE PAGE 002aaa249 Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface ...

Page 6

... Data transfer is unlimited in the read mode. The information is transmitted in bytes and each receiver acknowledges with a ninth bit. Within the I fast-speed mode (400 kHz clock rate) are defined. The PCF85102C-2 operates in only the standard-speed mode. By definition, a device that sends a signal is called a ‘transmitter’, and the device which receives the signal is called a ‘ ...

Page 7

... Byte/word write: address field. This address field is a word address providing access to the 256 words of memory. Upon receipt of the word address, the PCF85102C-2 responds with an acknowledge and awaits the next eight bits of data, again responding with an acknowledge. Word address is automatically incremented. The master can now terminate the transfer by generating a STOP condition or transmit up to six more bytes of data and then terminate by generating a STOP condition ...

Page 8

... Fig 5. Auto-increment memory word address; two byte write. Page write: initiated in the same manner as the byte write operation. The master can transit eight data bytes within one transmission. After receipt of each byte, the PCF85102C-2 will respond with an acknowledge. The typical E/W time in this mode ...

Page 9

... S SLAVE ADDRESS 0 A R/W Fig 7. Master reads PCF85102C-2 slave after setting word address (write word address; read data); sequential read. S SLAVE ADDRESS Fig 8. Master reads PCF85102C-2 immediately after first byte (read mode); current address read. 9397 750 14216 ...

Page 10

... Conditions Min 2 100 kHz SCL 100 kHz SCL 0.8 0. 0 DD(min amb Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface Max Unit +6 +150 C +85 C Typ Max Unit - 6 200 100 kHz - years © ...

Page 11

... Product data 256 8-bit CMOS EEPROM with I ; see Figure 9. DD Conditions repeated start HIGH t t HD;DAT SU;DAT 2 C-bus. Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface and V IL Min Max Unit 0 100 kHz 4.7 4.0 4.7 4.0 4.7 5 [1] 0 ...

Page 12

... E/W cycle per byte E/W 9397 750 14216 Product data 256 8-bit CMOS EEPROM with I Conditions internal oscillator external clock +85 C amb amb Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface Min Typ Max 100000 1000000 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. ...

Page 13

... REFERENCES JEDEC JEITA MO-001 SC-504-8 Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface SOT97 ( max. 3.60 8.25 10.0 7.62 0.254 1.15 3 ...

Page 14

... 0.25 5.0 4.0 6.2 1.27 1.05 0.19 4.8 3.8 5.8 0.0100 0.20 0.16 0.244 0.05 0.041 0.0075 0.19 0.15 0.228 REFERENCES JEDEC JEITA MS-012 Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface SOT96 detail X ( 1.0 0.7 0.7 0.25 0.25 0.1 0.4 0.6 ...

Page 15

... C (SnPb process) or below 245 C (Pb-free process) – for all the BGA and SSOP-T packages 9397 750 14216 Product data 256 8-bit CMOS EEPROM with I Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface ). stg(max) © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...

Page 16

... When using a dedicated tool, all other leads can be soldered in one operation within seconds between 270 and 320 C. 9397 750 14216 Product data 256 8-bit CMOS EEPROM with I 2 called small/thin packages. Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface 3 350 mm so called © Koninklijke Philips Electronics N.V. 2004. All rights reserved ...

Page 17

... HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS [7] PLCC , SO, SOJ suitable LQFP, QFP, TQFP not recommended SSOP, TSSOP, VSO, not recommended VSSOP Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface [2] Reflow Dipping [3] suitable not suitable suitable [6] suitable suitable [7][8] ...

Page 18

... Product data (9397 750 09641); second version; supersedes data in data sheet PCF85102C-2; PCF85103C-2 dated 2000 Feb 15 (9397 750 06682). ECN 853-2341 28170 dated 09 May 2002. Product data; initial version (as PCF85102C-2; PCF85103C-2 , 9397 750 06682). 01 20000215 - 9397 750 14216 Product data ...

Page 19

... Licenses Purchase of Philips I Rev. 04 — 22 October 2004 PCF85102C-2 2 C-bus interface 2 C components 2 Purchase of Philips I ...

Page 20

... Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 22 October 2004 Document order number: 9397 750 14216 PCF85102C-2 256 8-bit CMOS EEPROM with I 2 C-bus interface ...

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