ADP5062CP-EVALZ Analog Devices, ADP5062CP-EVALZ Datasheet - Page 26

• Manufacturer Part Number: ADP5062CP-EVALZ
• Description: Power Management IC Development Tools ADP5062 Evaluation board
• Manufacturer: Analog Devices
• Type: Linear Regulators - Standardr
• Series: ADP5062r

Specifications of ADP5062CP-EVALZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: ADP5062
• Input Voltage: 4 V to 6.7 V
• Description/function: Battery charger (isolated flyback)
• Interface Type: I2C
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Output Current: 2.1 A
• Factory Pack Quantity: 1
• For Use With: ADP5062

ADP5062
I
The
control of the charging and LDO functions, as well as for a
readback of the system status registers. The I
is 0x28 in write mode and 0x29 in read mode.
Register values are reset to the default values when the VINx
supply falls below the falling voltage threshold, V
The I
V
The subaddress content selects which of the
is written to first. The
2
IN
C INTERFACE
ST
is 0 V.
ST
ADP5062
2
0 0 1 0 1 0 0
C registers also reset when the battery is disconnected and
0
CHIP ADDRESS
0
CHIP ADDRESS
1
includes an I
0
1
0 = WRITE
0
ST
0
0 = WRITE
ADP5062
0
0 0 1 0 1 0 0
0
0
CHIP ADDRESS
2
ST
C-compatible serial interface for
0
SUBADDRESS
REGISTER N
0
sends an acknowledgement to
0
0 = WRITE
CHIP ADDRESS
SUBADDRESS
REGISTER N
1
0
0
1
0
0
0
2
ADP5062
C chip address
ST
0 = WRITE
0
SUBADDR ESS
0 0 1 0 1 0 0
VIN_OK_FALL
0
Figure 35. I
Figure 37. I
Figure 34. I
Figure 36. I
CHIP ADDRESS
0
0
registers
DATA TO REGISTER N
ADP5062 RECEIVES
2
.
2
SUBADDRESS
C Multiple Register Write Sequence
C Multiple Register Read Sequence
2
2
C Single Register Write Sequence
Rev. 0 | Page 26 of 44
C Single Register Read Sequence
1 = READ
0
1 0
ST
DATA OF REGISTER N
0
0 0 1 0 1 0 0
ADP5062 SENDS
CHIP ADDRESS
the master after the 8-bit data byte has been written (see Figure 34
for an example of the I
The
starts receiving a data byte at the next register until the master
sends an I
Figure 36 shows the I
ADP5062
subaddress and increments the subaddress automatically,
sending data from the next register until the master sends an
I
2
C stop condition, as shown in Figure 37.
0
0
ADP5062
DATA TO REGISTER N + 1
ADP5062 RECEIVES
ADP5062 RECEIVES
1 = READ
2
sends the data from the register denoted by the
C stop as shown in Figure 35.
1 0
DATA
0
increments the subaddress automatically and
DATA OF REGISTER
ADP5062 SENDS
0
ADP5062 SEND
N + 1
2
SDATA
C read sequence of a single register.
2
C write sequence to a single register).
MASTER STOP
0
0
SP
DATA TO LAST REGISTER
ADP5062 RECEIVES
0
MASTER
1
STOP
ADP5062 SENDS
DATA OF LAST
SP
REGISTER
Data Sheet
MASTER STOP
0
SP
MASTER
1
STOP
SP