MT48LC2M32B2P-5:G Micron Technology Inc, MT48LC2M32B2P-5:G Datasheet - Page 13

IC SDRAM 64MBIT 200MHZ 86TSOP

MT48LC2M32B2P-5:G

Manufacturer Part Number
MT48LC2M32B2P-5:G
Description
IC SDRAM 64MBIT 200MHZ 86TSOP
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC2M32B2P-5:G

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (2Mx32)
Speed
200MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
86-TSOP
Organization
2Mx32
Density
64Mb
Address Bus
13b
Access Time (max)
4.5ns
Maximum Clock Rate
200MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
280mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Package
86TSOP-II
Address Bus Width
13 Bit
Operating Supply Voltage
3.3 V
Maximum Random Access Time
4.5 ns
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Figure 4:
Burst Type
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
Mode Register Definition
M8
0
M9
0
1
M7
0
Programmed Burst Length
M6–M0
Defined
Accesses within a given burst may be programmed to be either sequential or interleaved;
this is referred to as the burst type and is selected via bit M3.
The ordering of accesses within a burst is determined by the burst length, the burst type,
and the starting column address, as shown in Table 5 on page 14.
Single Location Access
A10, BA0, and BA1 = “0”
Write Burst Mode
to ensure compatibility
with future devices.
Operating Mode
Standard Operation
All other states reserved
Reserved WB
Program
10
A10
M6
0
0
0
0
1
1
1
1
9
A9
M5
Op Mode
0
0
1
1
0
0
1
1
8
M4
A8
0
1
0
1
0
1
0
1
7
A7
13
CAS Latency
6
A6
CAS Latency
5
Reserved
Reserved
Reserved
Reserved
Reserved
A5
1
2
3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
4
A4
M3
BT
0
1
3
A3
M2
0
0
0
0
1
1
1
1
Burst Length
2
M1
A2
0
0
1
1
0
0
1
1
M0
1
0
1
0
1
0
1
0
1
A1
0
A0
Reserved
Reserved
Reserved
Full Page
M3 = 0
Burst Type
Interleaved
Sequential
1
2
4
8
Functional Description
Mode Register (Mx)
Address Bus
Burst Length
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
Reserved
Reserved
Reserved
Reserved
M3 = 1
1
2
4
8

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