Z0107NA0,412 NXP Semiconductors, Z0107NA0,412 Datasheet

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Z0107NA0,412

Manufacturer Part Number
Z0107NA0,412
Description
Triacs 800 V 1 A TO92
Manufacturer
NXP Semiconductors
Datasheet

Specifications of Z0107NA0,412

Rohs
yes
On-state Rms Current (it Rms)
1 A
Rated Repetitive Off-state Voltage Vdrm
800 V
Off-state Leakage Current @ Vdrm Idrm
800 V
Holding Current (ih Max)
10 mA
Gate Trigger Voltage (vgt)
1.3 V
Gate Trigger Current (igt)
5 mA
Mounting Style
Through Hole
Package / Case
TO-92-3
Factory Pack Quantity
1000
1. Product profile
1.1 General description
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
Planar passivated very sensitive gate four quadrant triac in a SOT54 (TO-92) plastic
package intended for use in applications requiring enhanced noise immunity and direct
interfacing to logic ICs and low power gate drivers.
Table 1.
Symbol
V
I
I
TSM
T(RMS)
DRM
Z0107NA0
4Q Triac
Rev. 3 — 12 May 2011
Direct interfacing to logic level ICs
Enhanced current surge capability
Enhanced noise immunity
High blocking voltage capability
General purpose low power motor
control
Home appliances
Parameter
repetitive peak off-state
voltage
non-repetitive peak
on-state current
RMS on-state current
Quick reference data
Conditions
full sine wave; T
t
see
full sine wave; T
see
see
p
= 20 ms; see
Figure 5
Figure
Figure 2
1; see
Figure
j(init)
lead
Figure
Planar passivated for voltage
ruggedness and reliability
Triggering in all four quadrants
Very sensitive gate
Industrial process control
Low power AC Fan controllers
≤ 45 °C;
= 25 °C;
4;
3;
Min
-
-
-
Product data sheet
Typ
-
-
-
Max Unit
800
12.5 A
1
V
A

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Z0107NA0,412 Summary of contents

Page 1

Z0107NA0 4Q Triac Rev. 3 — 12 May 2011 1. Product profile 1.1 General description Planar passivated very sensitive gate four quadrant triac in a SOT54 (TO-92) plastic package intended for use in applications requiring enhanced noise immunity and direct ...

Page 2

... NXP Semiconductors Table 1. Symbol Static characteristics Pinning information Table 2. Pinning information Pin Symbol Description 1 T2 main terminal gate 3 T1 main terminal 1 3. Ordering information Table 3. Ordering information Type number Package Name Z0107NA0 TO-92 Z0107NA0 Product data sheet Quick reference data … ...

Page 3

... NXP Semiconductors 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V repetitive peak off-state voltage DRM I RMS on-state current T(RMS) I non-repetitive peak on-state TSM current for fusing dI /dt rate of rise of on-state current ...

Page 4

... NXP Semiconductors 2.0 conduction form P tot angle factor (W) (degrees 2.8 90 2.2 120 1.9 1.2 180 1.57 0.8 0.4 0.0 0 0.2 Fig 3. Total power dissipation as a function of RMS on-state current; maximum values 16 I TSM ( Fig 4. Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum ...

Page 5

... NXP Semiconductors TSM ( (1) ( −5 10 Fig 5. Non-repetitive peak on-state current as a function of pulse width; maximum values Z0107NA0 Product data sheet −4 − All information provided in this document is subject to legal disclaimers. Rev. 3 — 12 May 2011 Z0107NA0 4Q Triac 003aaf490 ...

Page 6

... NXP Semiconductors 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter R thermal resistance from junction th(j-lead) to lead R thermal resistance from junction th(j-a) to ambient th(j-lead) (K/ Fig 6. Transient thermal impedance from junction to lead as a function of pulse width Z0107NA0 Product data sheet Conditions full cycle ...

Page 7

... NXP Semiconductors 6. Characteristics Table 6. Characteristics Symbol Parameter Static characteristics I gate trigger current GT I latching current L I holding current H V on-state voltage T V gate trigger voltage GT I off-state current D Dynamic characteristics dV /dt rate of rise of off-state voltage /dt rate of change of com commutating voltage ...

Page 8

... NXP Semiconductors GT(25°C) 3 (1) (2) ( (1) T2- G+ (2) T2- G- (3) T2+ G- (4) T2+ G+ Fig 7. Normalized gate trigger current as a function of junction temperature H(25° - Fig 9. Normalized holding current as a function of junction temperature Z0107NA0 Product data sheet ...

Page 9

... NXP Semiconductors 1 GT(25°C) 1.2 0.8 0 Fig 11. Normalized gate trigger voltage as a function of junction temperature Z0107NA0 Product data sheet 003aaa209 1.6 A 1.2 0.8 0.4 0 100 150 T (°C) j Fig 12. Normalized critical rate of rise of off-state voltage as a function of junction temperature; typical values All information provided in this document is subject to legal disclaimers. ...

Page 10

... NXP Semiconductors 7. Package outline Plastic single-ended leaded (through hole) package; 3 leads DIMENSIONS (mm are the original dimensions) UNIT 5.2 0.48 0.66 0.45 mm 5.0 0.40 0.55 0.38 Note 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION ...

Page 11

... NXP Semiconductors 8. Package outline Fig 14. Package outline SOT54 (TO-92) Z0107NA0 Product data sheet 4.2 3.6 4.8 4.4 5.2 14.5 5.0 12.7 Dimensions in mm All information provided in this document is subject to legal disclaimers. Rev. 3 — 12 May 2011 Z0107NA0 0.45 0.38 0.48 0. 2.54 1.27 3 04-11-16 © NXP B.V. 2011. All rights reserved. 4Q Triac ...

Page 12

... NXP Semiconductors 9. Revision history Table 7. Revision history Document ID Release date Z0107NA0 v.3 20110512 • Modifications: Various changes to content. Z0107NA0 v.2 20110322 Z0107NA0 Product data sheet Data sheet status Change notice Product data sheet - Product data sheet - All information provided in this document is subject to legal disclaimers. ...

Page 13

... NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. ...

Page 14

... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

Page 15

... NXP Semiconductors 12. Contents 1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.1 General description . . . . . . . . . . . . . . . . . . . . . .1 1.2 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 3 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 4 Limiting values Thermal characteristics . . . . . . . . . . . . . . . . . . .6 6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .7 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 11 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .12 10 Legal information .13 10.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13 10 ...

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