PBSS4112PANP,115 NXP Semiconductors, PBSS4112PANP,115 Datasheet

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PBSS4112PANP,115

Manufacturer Part Number
PBSS4112PANP,115
Description
Transistors Bipolar - BJT 120V 1A NPN/NPN lo VCEsat transistor
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PBSS4112PANP,115

Rohs
yes
Configuration
Dual
Transistor Polarity
NPN/PNP
Collector- Base Voltage Vcbo
120 V
Collector- Emitter Voltage Vceo Max
120 V
Emitter- Base Voltage Vebo
7 V
Collector-emitter Saturation Voltage
90 mV, - 150 mV
Maximum Dc Collector Current
1.5 A
Gain Bandwidth Product Ft
120 MHz, 100 MHz
Dc Collector/base Gain Hfe Min
240, 190
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Package / Case
DFN2020-6
Continuous Collector Current
1 A
Dc Current Gain Hfe Max
305, 375
Maximum Power Dissipation
1450 mW
Minimum Operating Temperature
- 55 C
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1. Product profile
Table 1.
Symbol
Per transistor; for the PNP transistor with negative polarity
V
I
I
TR1 (NPN)
R
C
CM
CEO
CEsat
Quick reference data
Parameter
collector-emitter
voltage
collector current
peak collector current
collector-emitter
saturation resistance
1.1 General description
1.2 Features and benefits
1.3 Applications
1.4 Quick reference data
NPN/PNP low V
medium power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package.
NPN/NPN complement: PBSS4112PAN. PNP/PNP complement: PBSS5112PAP.
PBSS4112PANP
120 V, 1 A NPN/PNP low VCEsat (BISS) transistor
29 November 2012
Very low collector-emitter saturation voltage V
High collector current capability I
High collector current gain h
Reduced Printed-Circuit Board (PCB) requirements
High efficiency due to less heat generation
AEC-Q101 qualified
Load switch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
Conditions
open base
single pulse; t
I
t
CEsat
C
p
≤ 300 µs; δ ≤ 0.02 ; T
= 500 mA; I
Breakthrough In Small Signal (BISS) transistor in a leadless
p
B
≤ 1 ms
= 50 mA; pulsed;
FE
at high I
C
amb
and I
= 25 °C
C
CM
CEsat
Min
-
-
-
-
Product data sheet
Typ
-
-
-
-
Max
120
1
1.5
240
Unit
V
A
A

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PBSS4112PANP,115 Summary of contents

Page 1

PBSS4112PANP 120 NPN/PNP low VCEsat (BISS) transistor 29 November 2012 1. Product profile 1.1 General description NPN/PNP low V medium power DFN2020-6 (SOT1118) Surface-Mounted Device (SMD) plastic package. NPN/NPN complement: PBSS4112PAN. PNP/PNP complement: PBSS5112PAP. 1.2 Features and ...

Page 2

... NXP Semiconductors Symbol Parameter TR2 (PNP) R collector-emitter CEsat saturation resistance 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 E1 emitter TR1 2 B1 base TR1 3 C2 collector TR2 4 E2 emitter TR2 5 B2 base TR2 6 C1 collector TR1 7 C1 collector TR1 8 C2 collector TR2 3 ...

Page 3

... NXP Semiconductors Symbol Parameter V emitter-base voltage EBO I collector current C I peak collector current CM I base current B I peak base current BM P total power dissipation tot Per device P total power dissipation tot T junction temperature j T ambient temperature amb T storage temperature stg [1] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint. ...

Page 4

... NXP Semiconductors (1) 4-layer PCB 70 µm, mounting pad for collector 1 cm (2) FR4 PCB 70 µm, mounting pad for collector 1 cm (3) 4-layer PCB 70 µm, standard footprint (4) 4-layer PCB 35 µm, mounting pad for collector 1 cm (5) FR4 PCB 35 µm, mounting pad for collector 1 cm (6) 4-layer PCB 35 µm, standard footprint (7) FR4 PCB 70 µ ...

Page 5

... NXP Semiconductors Symbol Parameter Per device R thermal resistance th(j-a) from junction to ambient [1] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated and standard footprint. [2] Device mounted on an FR4 PCB, single-sided 35 µm copper strip line, tin-plated, mounting pad for collector 1 cm [3] Device mounted on 4-layer PCB 35 µ ...

Page 6

... NXP Semiconductors th(j-a) (K/W) duty cycle = 1 0. 0.5 0.33 0.2 0.1 0.05 10 0.02 0. FR4 PCB 35 µm, mounting pad for collector 1 cm Fig. 3. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values th(j-a) (K/W) duty cycle = 1 0.75 2 0.5 10 0.33 0.2 0.1 0.05 10 0.02 0. 4-layer PCB 35 µ ...

Page 7

... NXP Semiconductors th(j-a) (K/W) duty cycle = 1 0. 0.5 0.33 0.2 0.1 10 0.05 0.02 0. 4-layer PCB 35 µm, mounting pad for collector 1 cm Fig. 5. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values th(j-a) duty cycle = 1 (K/W) 0.75 0 0.33 0.2 0.1 0.05 10 0.02 0. FR4 PCB 70 µ ...

Page 8

... NXP Semiconductors th(j-a) (K/W) duty cycle = 1 2 0.75 10 0.5 0.33 0.2 0.1 10 0.05 0.02 0. FR4 PCB 70 µm, mounting pad for collector 1 cm Fig. 7. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values th(j-a) (K/W) duty cycle = 1 0. 0.5 0.33 0.2 0.1 0.05 10 0.02 0. 4-layer PCB 70 µ ...

Page 9

... NXP Semiconductors 2 10 duty cycle = 1 0.75 0.5 Z th(j-a) (K/W) 0.33 0.2 10 0.1 0.05 0.02 0. 4-layer PCB 70 µm, mounting pad for collector 1 cm Fig. 9. Per transistor: transient thermal impedance from junction to ambient as a function of pulse duration; typical values 7. Characteristics Table 7. Characteristics Symbol Parameter TR1 (NPN) I collector-base cut-off ...

Page 10

... NXP Semiconductors Symbol Parameter V base-emitter saturation BEsat voltage V base-emitter turn-on BEon voltage t delay time d t rise time r t turn-on time on t storage time s t fall time f t turn-off time off f transition frequency T C collector capacitance c TR2 (PNP) I collector-base cut-off CBO current ...

Page 11

... NXP Semiconductors Symbol Parameter V base-emitter turn-on BEon voltage t delay time d t rise time r t turn-on time on t storage time s t fall time f t turn-off time off f transition frequency T C collector capacitance c 600 ( (2) 400 (3) 200 ( 100 ° ...

Page 12

... NXP Semiconductors 1 (V) (1) 0.8 (2) 0.4 ( −55 °C amb ( °C amb ( 100 °C amb Fig. 12. TR1 (NPN): Base-emitter voltage as a function of collector current; typical values 1 V CEsat ( (1) ( 100 ° ...

Page 13

... NXP Semiconductors CEsat (Ω ( 100 °C amb ( °C amb ( −55 °C amb Fig. 16. TR1 (NPN): Collector-emitter saturation resistance as a function of collector current; typical values 600 h (1) FE 400 (2) (3) 200 0 -1 -10 ...

Page 14

... NXP Semiconductors -1 (V) (1) -0.8 (2) (3) -0.4 0.0 -1 - − ( −55 °C amb ( °C amb ( 100 °C amb Fig. 20. TR2 (PNP): Base-emitter voltage as a function of collector current; typical values -1 V CEsat (V) -1 -10 (1) (2) (3) -2 -10 -1 - 100 ° ...

Page 15

... NXP Semiconductors CEsat (Ω - 100 °C amb ( °C amb ( −55 °C amb Fig. 24. TR2 (PNP): Collector-emitter saturation resistance as a function of collector current; typical values PBSS4112PANP Product data sheet 120 NPN/PNP low VCEsat (BISS) transistor ...

Page 16

... NXP Semiconductors 8. Test information Fig. 26. TR1 (NPN): BISS transistor switching time definition Fig. 27. TR1 (NPN): Test circuit for switching times PBSS4112PANP Product data sheet 120 NPN/PNP low VCEsat (BISS) transistor All information provided in this document is subject to legal disclaimers. 29 November 2012 PBSS4112PANP © ...

Page 17

... NXP Semiconductors Fig. 28. TR2 (PNP): BISS transistor switching time definition Fig. 29. TR2 (PNP): Test circuit for switching times 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications ...

Page 18

... NXP Semiconductors 9. Package outline Fig. 30. Package outline DFN2020-6 (SOT1118) 10. Soldering 0.875 2.25 0.875 Fig. 31. Reflow soldering footprint for DFN2020-6 (SOT1118) 11. Revision history Table 8. Revision history Data sheet ID Release date PBSS4112PANP v.1 20121129 PBSS4112PANP Product data sheet 120 NPN/PNP low VCEsat (BISS) transistor 2 ...

Page 19

... PBSS4112PANP Product data sheet 120 NPN/PNP low VCEsat (BISS) transistor In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory ...

Page 20

... NXP Semiconductors No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations ...

Page 21

... NXP Semiconductors 13. Contents 1 Product profile ....................................................... 1 1.1 General description .............................................. 1 1.2 Features and benefits ...........................................1 1.3 Applications .......................................................... 1 1.4 Quick reference data ............................................ 1 2 Pinning information ............................................... 2 3 Ordering information ............................................. 2 4 Marking ................................................................... 2 5 Limiting values .......................................................2 6 Thermal characteristics .........................................4 7 Characteristics ....................................................... 9 8 Test information ................................................... 16 8.1 Quality information ......................................... 9 Package outline ................................................... 18 10 Soldering .............................................................. 18 11 Revision history ................................................... 18 12 Legal information ...

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