IS41LV16100B-60TLI ISSI, Integrated Silicon Solution Inc, IS41LV16100B-60TLI Datasheet

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IS41LV16100B-60TLI

Manufacturer Part Number
IS41LV16100B-60TLI
Description
IC DRAM 16MBIT 60NS 44TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Type
EDOr
Datasheet

Specifications of IS41LV16100B-60TLI

Format - Memory
RAM
Memory Type
DRAM - EDO
Memory Size
16M (1M x 16)
Speed
60ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TSOP II
Organization
1Mx16
Density
16Mb
Address Bus
10b
Access Time (max)
60ns
Maximum Clock Rate
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
170mA
Pin Count
44
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
IS41LV16100B
1M x 16 (16-MBIT) DYNAMIC RAM
WITH EDO PAGE MODE
FEATURES
• TTL compatible inputs and outputs; tristate I/O
• Refresh Interval:
• JEDEC standard pinout
• Single power supply: 3.3V ± 10%
• Byte Write and Byte Read operation via two CAS
• Industrial Temperature Range: -40
• Lead-free available
PIN CONFIGURATIONS
50(44)-Pin TSOP (Type II)
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time
without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to
obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
12/11/06
VDD
VDD
VDD
RAS
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
WE
NC
NC
NC
NC
NC
A0
A1
A2
A3
— Auto refresh Mode: 1,024 cycles /16 ms
— RAS-Only, CAS-before-RAS (CBR), and Hidden
— Self refresh Mode: 1,024 cycles /128 ms
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
GND
42-Pin SOJ
VDD
VDD
RAS
VDD
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
WE
NC
NC
NC
NC
A0
A1
A2
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
o
C to +85
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
LCAS
UCAS
OE
A9
A8
A7
A6
A5
A4
GND
o
C
1-800-379-4774
KEY TIMING PARAMETERS
DESCRIPTION
The
mance CMOS Dynamic Random Access Memories. These
devices offer an accelerated cycle access called EDO
Page Mode. EDO Page Mode allows 1,024 random ac-
cesses within a single row with access cycle time as short
as 20 ns per 16-bit word.
These features make the IS41LV16100B ideally suited for
high-bandwidth graphics, digital signal processing, high-
performance computing systems, and peripheral
applications.
The IS41LV16100B is packaged in a 42-pin 400-mil SOJ
and 400-mil 50- (44-) pin TSOP (Type II).
PIN DESCRIPTIONS
A0-A9
I/O0-15
WE
OE
RAS
UCAS
LCAS
V
GND
NC
Parameter
Max. RAS Access Time (t
Max. CAS Access Time (t
Max. Column Address Access Time (t
Min. EDO Page Mode Cycle Time (t
Min. Read/Write Cycle Time (t
DD
ISSI
IS41LV16100B is 1,048,576 x 16-bit high-perfor-
Address Inputs
Data Inputs/Outputs
Write Enable
Output Enable
Row Address Strobe
Upper Column Address Strobe
Lower Column Address Strobe
Power
Ground
No Connection
RAC
CAC
)
)
RC
)
DECEMBER 2006
PC
)
AA
)
-50
50
14
25
30
85
110
-60
15
30
40
60
Unit
ns
ns
ns
ns
ns
®
1

Related parts for IS41LV16100B-60TLI

IS41LV16100B-60TLI Summary of contents

Page 1

... These features make the IS41LV16100B ideally suited for high-bandwidth graphics, digital signal processing, high- performance computing systems, and peripheral applications. The IS41LV16100B is packaged in a 42-pin 400-mil SOJ + and 400-mil 50- (44-) pin TSOP (Type II). ...

Page 2

... IS41LV16100B FUNCTIONAL BLOCK DIAGRAM OE WE CAS LCAS CLOCK UCAS GENERATOR RAS RAS CLOCK GENERATOR REFRESH COUNTER ADDRESS BUFFERS A0- CONTROL CAS WE LOGICS DATA I/O BUS COLUMN DECODERS SENSE AMPLIFIERS MEMORY ARRAY 1,048,576 x 16 Integrated Silicon Solution, Inc. — www.issi.com — ISSI OE CONTROL ...

Page 3

... IS41LV16100B TRUTH TABLE Function Standby Read: Word Read: Lower Byte Read: Upper Byte Write: Word (Early Write) Write: Lower Byte (Early Write) Write: Upper Byte (Early Write) (1,2) Read-Write (2) EDO Page-Mode Read 1st Cycle: 2nd Cycle: Any Cycle: (1) EDO Page-Mode Write ...

Page 4

... I/O tristate logic (in conjunction with OE and WE and RAS). LCAS controls I/O0 through I/O7 and UCAS controls I/O8 through I/O15. The IS41LV16100B CAS function is determined by the first CAS (LCAS or UCAS) transitioning LOW and the last transitioning back HIGH. The two CAS controls give the IS41LV16100B both BYTE READ and BYTE WRITE cycle capabilities ...

Page 5

... IS41LV16100B ABSOLUTE MAXIMUM RATINGS Symbol Parameters V Voltage on Any Pin Relative to GND T V Supply Voltage DD I Output Current OUT P Power Dissipation D T Commercial Operation Temperature A Industrial Operation Temperature T Storage Temperature STG Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device ...

Page 6

... IS41LV16100B ELECTRICAL CHARACTERISTICS (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter I Input Leakage Current IL I Output Leakage Current IO V Output High Voltage Level OH V Output Low Voltage Level OL I Standby Current: TTL Standby Current: CMOS Operating Current Random Read/Write (2,3,4) Average Power Supply Current ...

Page 7

... IS41LV16100B (1,2,3,4,5,6) AC CHARACTERISTICS (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter t Random READ or WRITE Cycle Time RC Access Time from RAS t RAC Access Time from CAS t CAC t Access Time from Column-Address AA RAS Pulse Width t RAS RAS Precharge Time t RP CAS Pulse Width ...

Page 8

... IS41LV16100B AC CHARACTERISTICS (Continued) (Recommended Operating Conditions unless otherwise noted.) Symbol Parameter t Write Command Pulse Width WP WE Pulse Widths to Disable Outputs t WPZ Write Command to RAS Lead Time t RWL Write Command to CAS Lead Time t CWL t Write Command Setup Time WCS Data-in Hold Time (referenced to RAS) ...

Page 9

... IS41LV16100B AC TEST CONDITIONS Output load: One TTL Load and Input timing reference levels Output timing reference levels Notes initial pause of 200 µs is required after power-up followed by eight RAS refresh cycle (RAS-Only or CBR) before proper device operation is assured. The eight RAS cycles wake-up should be repeated any time the t 2 ...

Page 10

... IS41LV16100B READ CYCLE RAS t CRP UCAS/LCAS t ASR ADDRESS Row WE I/O OE Note: is referenced from rising edge of RAS or CAS, whichever occurs last OFF RAS t CSH t RSH t t CAS RCD RAD RAL t t RAH ASC Column t RCS RAC t CAC t CLC Open t OE Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 11

... IS41LV16100B EARLY WRITE CYCLE (OE = DON'T CARE) RAS t CRP UCAS/LCAS t ASR ADDRESS Row WE I/O Integrated Silicon Solution, Inc. — www.issi.com — Rev. C 12/11/ RAS t CSH t RSH t t CAS RCD RAD RAL RAH CAH ASC t ACH Column t CWL t RWL t WCR t t WCS WCH ...

Page 12

... IS41LV16100B READ WRITE CYCLE (LATE WRITE and READ-MODIFY-WRITE Cycles) RAS t CRP UCAS/LCAS t ASR ADDRESS Row WE I RWC t RAS t CSH t t CAS RCD RAD RAH ASC CAH Column t RWD t t RCS CWD t AWD RAC t CAC t CLZ Open Valid Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 13

... IS41LV16100B EDO-PAGE-MODE READ CYCLE RAS t CRP UCAS/LCAS t RAD t ASR ADDRESS Row t RAH WE Open I/O OE Note: can be measured from falling edge of CAS to falling edge of CAS, or from rising edge of CAS to rising edge of CAS. Both measurements must meet the t specifications. PC Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 14

... IS41LV16100B EDO-PAGE-MODE EARLY-WRITE CYCLE RAS t CRP UCAS/LCAS t RAD t ASR ADDRESS Row t RAH WE I RASP t CSH RCD CAS, CP CAS CLCH CLCH ACH ACH ASC CAH ASC Column Column t t CWL CWL t t WCS WCS t t WCH WCH WCR t DHR Valid Data Valid Data Integrated Silicon Solution, Inc. — ...

Page 15

... IS41LV16100B EDO-PAGE-MODE READ-WRITE CYCLE RAS t CSH t t CRP RCD UCAS/LCAS ASR RAD t t ASC RAH ADDRESS Row t RWD t RCS WE t RAC t CAC t CLZ Open I/O OE Note: can be measured from falling edge of CAS to falling edge of CAS, or from rising edge of CAS to rising edge of CAS. Both 1 ...

Page 16

... IS41LV16100B EDO-PAGE-MODE READ-EARLY-WRITE CYCLE RAS CRP RCD UCAS/LCAS ASR RAD t t ASC RAH ADDRESS Row t RCS WE t RAC t CAC Open I (Pseudo READ-MODIFY WRITE) t RASP CSH CAS CAS CAH ASC CAH Column (A) Column ( CPA t CAC t COH Valid Data (A) Valid Data ( Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 17

... IS41LV16100B AC WAVEFORMS (With WE-Controlled Disable) READ CYCLE RAS t CRP UCAS/LCAS t ASR ADDRESS Row WE I/O OE RAS RAS RAS RAS-ONLY REFRESH CYCLE RAS RAS t CRP UCAS/LCAS t ASR ADDRESS I/O Integrated Silicon Solution, Inc. — www.issi.com — Rev. C 12/11/06 t CSH t t RCD CAS t AR ...

Page 18

... IS41LV16100B CBR CBR CBR CBR REFRESH CYCLE CBR (Addresses; WE DON'T CARE) RAS t RPC t CP UCAS/LCAS I/O HIDDEN REFRESH CYCLE (1) RAS t CRP UCAS/LCAS t ASR ADDRESS Row I/O OE Notes Hidden Refresh may also be performed after a Write Cycle. In this case LOW and OE = HIGH. is referenced from rising edge of RAS or CAS, whichever occurs last. ...

Page 19

... Speed (ns) Order Part No. 50 IS41LV16100B-50KI IS41LV16100B-50KLI IS41LV16100B-50TI IS41LV16100B-50TLI 60 IS41LV16100B-60KI IS41LV16100B-60KLI IS41LV16100B-60TI IS41LV16100B-60TLI Integrated Silicon Solution, Inc. — www.issi.com — Rev. C 12/11/06 Package 400-mil SOJ 400-mil SOJ, Lead-free 400-mil TSOP (Type II) 400-mil TSOP (Type II), Lead-free 400-mil SOJ 400-mil SOJ, Lead-free 400-mil TSOP (Type II) ...

Page 20

PACKAGING INFORMATION 400-mil Plastic SOJ Package Code Millimeters Inches Symbol Min Max Min No. Leads ( 3.25 3.75 0.128 0.148 A1 0.64 — 0.025 A2 2.08 — 0.082 B 0.38 0.51 0.015 0.020 ...

Page 21

PACKAGING INFORMATION Millimeters Inches Symbol Min Max Min No. Leads ( 3.25 3.75 0.128 0.148 A1 0.64 — 0.025 A2 2.08 — 0.082 B 0.38 0.51 0.015 0.020 b 0.66 0.81 0.026 0.032 C 0.18 0.33 0.007 0.013 ...

Page 22

PACKAGING INFORMATION Plastic TSOP Package Code: T (Type II Plastic TSOP (T - Type II) (MS 25) Millimeters Inches Symbol Min Max Min Max Ref. Std. N 24/26 A 1.20 0.0472 A1 0.05 0.15 0.002 0.0059 ...

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