MT48V8M16LFB4-8:G Micron Technology Inc, MT48V8M16LFB4-8:G Datasheet - Page 47

• Manufacturer Part Number: MT48V8M16LFB4-8:G
• Description: IC SDRAM 128MBIT 125MHZ 54VFBGA
• Manufacturer: Micron Technology Inc
• Type: Mobile SDRAMr

Specifications of MT48V8M16LFB4-8:G

• Format - Memory: RAM
• Memory Type: Mobile SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 125MHz
• Interface: Parallel
• Voltage - Supply: 2.3 V ~ 2.7 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 54-VFBGA
• Organization: 8Mx16
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 19/8/7ns
• Maximum Clock Rate: 125MHz
• Operating Supply Voltage (typ): 2.5V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 2.7V
• Operating Supply Voltage (min): 2.3V
• Supply Current: 100mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 11:
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
Current State
precharging
Activating,
precharge)
precharge)
(with auto
(with auto
precharge
precharge
active, or
disabled)
disabled)
Write
Write
(auto
(auto
Read
Read
Row
Any
Idle
Truth Table – CURRENT STATE BANK n, COMMAND tO BANK m
Notes 1–6 apply to entire table; notes appear below and on next page
CS#
Notes:
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
RAS#
1. This table applies when CKE
2. This table describes alternate bank operation, except where noted; that is, the current state
3. Current state definitions:
4. AUTO REFRESH, SELF REFRESH, and LOAD MODE REGISTER commands may only be issued
5. A BURST TERMINATE command cannot be issued to another bank; it applies to the bank
X
H
X
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
after
is for bank n and the commands shown are those allowed to be issued to bank m (assuming
that bank m is in such a state that the given command is allowable). Exceptions are covered
in the notes below.
when all banks are idle.
represented by the current state only.
precharge enabled:
precharge enabled:
CAS#
t
H
H
H
H
H
H
H
H
H
H
H
X
X
XSR has been met (if the previous state was self refresh).
L
L
L
L
L
L
L
L
L
L
Write w/auto
Read w/auto
Row active: A row in the bank has been activated, and
WE# Command (Action)
Write: A WRITE burst has been initiated, with auto precharge disabled, and
H
H
H
H
H
H
H
H
H
H
H
X
X
L
L
L
L
L
L
L
L
L
L
Read: A READ burst has been initiated, with auto precharge disabled, and
Idle: The bank has been precharged, and
COMMAND INHIBIT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous operation)
Any command otherwise allowed to bank m
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start new READ burst)
WRITE (Select column and start WRITE burst)
PRECHARGE
ACTIVE (Select and activate row)
READ (Select column and start READ burst)
WRITE (Select column and start new WRITE burst)
PRECHARGE
data bursts/accesses and no register accesses are in progress.
has not yet terminated or been terminated.
has not yet terminated or been terminated.
Starts with registration of a READ command with auto precharge
enabled and ends when
will be in the idle state.
Starts with registration of a WRITE command with auto precharge
enabled and ends when
will be in the idle state.
n - 1
47
was HIGH and CKE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
t
128Mb: x16, x32 Mobile SDRAM
RP has been met. After
RP has been met. After
n
is HIGH (see Table 9 on page 44) and
t
RP has been met.
©2001 Micron Technology, Inc. All rights reserved.
t
RCD has been met. No
t
t
RP is met, the bank
RP is met, the bank
7, 8, 14
7, 8, 15
7, 8, 16
7, 8, 17
Notes
READs
7, 10
7, 11
7, 12
7, 13
7
7
9
9
9
9