IC SDRAM 128MBIT 125MHZ 54VFBGA

 

MT48V8M16LFB4-8:G TR

Manufacturer Part NumberMT48V8M16LFB4-8:G TR
DescriptionIC SDRAM 128MBIT 125MHZ 54VFBGA
ManufacturerMicron Technology Inc
MT48V8M16LFB4-8:G TR datasheets

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Specifications of MT48V8M16LFB4-8:G TR

Format - MemoryRAMMemory TypeMobile SDRAM
Memory Size128M (8Mx16)Speed125MHz
InterfaceParallelVoltage - Supply2.3 V ~ 2.7 V
Operating Temperature0°C ~ 70°CPackage / Case54-VFBGA
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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Figure 25:
WRITE-to-PRECHARGE
CLK
t
t
WR@
DQM
COMMAND
ADDRESS
t
t
WR@
DQM
COMMAND
ADDRESS
Notes:
1. DQM could remain LOW in this example if the WRITE burst is a fixed length of two.
Fixed-length or full-page WRITE bursts can be truncated with the BURST TERMINATE
command. When truncating a WRITE burst, the input data applied coincident with the
BURST TERMINATE command will be ignored. The last data written (provided that
DQM is LOW at that time) will be the input data applied one clock previous to the
BURST TERMINATE command. This is shown in Figure 26, where data n is the last
desired data element of a longer burst.
Figure 26:
Terminating a WRITE Burst
CLK
COMMAND
ADDRESS
TRANSITIONING DATA
Notes:
1. DQMs are LOW.
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
T0
T1
T2
T3
CK 15ns
NOP
WRITE
NOP
PRECHARGE
BANK
BANK a,
(a or all)
COL n
t
WR
D
D
IN
IN
DQ
n
n + 1
CK < 15ns
WRITE
NOP
NOP
PRECHARGE
BANK
BANK a,
(a or all)
COL n
t
WR
D
D
IN
IN
DQ
n
n + 1
TRANSITIONING DATA
T0
T1
T2
BURST
NEXT
WRITE
TERMINATE
COMMAND
BANK,
(ADDRESS)
COL n
D
IN
DQ
(DATA)
n
DON’T CARE
38
128Mb: x16, x32 Mobile SDRAM
T4
T5
T6
t RP
NOP
NOP
ACTIVE
BANK a,
ROW
t RP
NOP
NOP
ACTIVE
BANK a,
ROW
DON’T CARE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001 Micron Technology, Inc. All rights reserved.
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