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MT48V8M16LFB4-8:G TR
MT48V8M16LFB4-8:G TR | |
|---|---|
| Manufacturer Part Number | MT48V8M16LFB4-8:G TR |
| Description | IC SDRAM 128MBIT 125MHZ 54VFBGA |
| Manufacturer | Micron Technology Inc |
| MT48V8M16LFB4-8:G TR datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
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- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
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Specifications of MT48V8M16LFB4-8:G TR | |||
|---|---|---|---|
| Format - Memory | RAM | Memory Type | Mobile SDRAM |
| Memory Size | 128M (8Mx16) | Speed | 125MHz |
| Interface | Parallel | Voltage - Supply | 2.3 V ~ 2.7 V |
| Operating Temperature | 0°C ~ 70°C | Package / Case | 54-VFBGA |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | ||
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Figure 28:
Power-Down
CLK
CKE
COMMAND
All banks idle
CLOCK SUSPEND
The clock suspend mode occurs when a column access/burst is in progress and CKE is
registered low. In the clock suspend mode, the internal clock is deactivated, “freezing”
the synchronous logic.
For each positive clock edge on which CKE is sampled LOW, the next internal positive
clock edge is suspended. Any command or data present on the input pins at the time of a
suspended internal clock edge is ignored; any data present on the DQ pins remains
driven; and burst counters are not incremented as long as the clock is suspended. (See
examples in Figure 29 and in Figure 30 on page 41.)
Figure 29:
Clock Suspend During WRITE Burst
CLK
CKE
INTERNAL
CLOCK
COMMAND
ADDRESS
Notes:
1. For this example, burst length = 4 or greater, and DM is LOW.
Clock suspend mode is exited by registering CKE HIGH; the internal clock and related
operation will resume on the subsequent positive clock edge.
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
(
(
)
)
(
(
)
)
t CKS
(
(
)
)
(
(
)
)
NOP
(
(
)
)
Input buffers gated off
Enter power-down mode.
Exit power-down mode.
T0
T1
T2
T3
NOP
WRITE
BANK,
COL n
D
IN
D
IN
n
TRANSITIONING DATA
40
128Mb: x16, x32 Mobile SDRAM
> t CKS
NOP
ACTIVE
t RCD
t RAS
t RC
DON’T CARE
T4
T5
NOP
NOP
D
D
IN
IN
n + 1
n + 2
DON’T CARE
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001 Micron Technology, Inc. All rights reserved.
READs
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