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MT48V8M16LFB4-8:G TR
MT48V8M16LFB4-8:G TR | |
|---|---|
| Manufacturer Part Number | MT48V8M16LFB4-8:G TR |
| Description | IC SDRAM 128MBIT 125MHZ 54VFBGA |
| Manufacturer | Micron Technology Inc |
| MT48V8M16LFB4-8:G TR datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
×
Shipping terms
- Standard delivery time differs from 5-8 business days if the supplier is a local one to 12-14 days if the suplier is from overseas. If delivery time differs it's always mentioned in our quotation.
- We ship worldwide using main international couriers like FedEx, DHL, UPS, TNT, EMS. We can also use client's freight account. Other shipping methods can be discussed. We do best to meet your needs!
Payment terms
- For new client payment term is payment in advance. At this moment we accept 3 payment methods: wire transfer, PayPal and Western Union. Credit card payment is under constrution and will be introduced soon. Escrow service is acceptable. Net terms for regular customers is not a problem. Working with us is totally safe for you.
- If you still have any questions - please contact us
Specifications of MT48V8M16LFB4-8:G TR | |||
|---|---|---|---|
| Format - Memory | RAM | Memory Type | Mobile SDRAM |
| Memory Size | 128M (8Mx16) | Speed | 125MHz |
| Interface | Parallel | Voltage - Supply | 2.3 V ~ 2.7 V |
| Operating Temperature | 0°C ~ 70°C | Package / Case | 54-VFBGA |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | ||
PrevNext
Figure 41:
Auto Refresh Mode
T0
CLK
t CK
CKE
t CKS
t CKH
t CMS
t CMH
COMMAND
PRECHARGE
DQMU, DQML
A0–A9, A11
ALL BANKS
A10
SINGLE BANK
t AS
t AH
BA0, BA1
BANK(S)
High-Z
DQ
Precharge all
active banks
Notes:
1. Each AUTO REFRESH command performs a refresh cycle. Back-to-back commands are not
required. See Table 17 on page 53.
t
2.
RFC must not be interrupted by any executable command; COMMAND INHIBIT or NOP
commands must be applied on each positive clock edge during
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
T1
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
62
128Mb: x16, x32 Mobile SDRAM
Timing Diagrams
To + 1
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DON’T CARE
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RFC.
©2001 Micron Technology, Inc. All rights reserved.
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IC SDRAM 128MBIT 125MHZ 54VFBGA | Micron Technology Inc |
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IC SDRAM 128MBIT 125MHZ 54VFBGA | Micron Technology Inc |
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IC SDRAM 128MBIT 125MHZ 54VFBGA | Micron Technology Inc |
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IC SDRAM 128MBIT 125MHZ 54VFBGA | Micron Technology Inc |
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IC SDRAM 128MBIT 100MHZ 54VFBGA | Micron Technology Inc |
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IC SDRAM 128MBIT 100MHZ 54VFBGA | Micron Technology Inc |
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IC SDRAM 128MBIT 125MHZ 54VFBGA | Micron Technology Inc |
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IC SDRAM 128MBIT 125MHZ 54VFBGA | Micron Technology Inc |
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