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MT48V8M16LFB4-8 IT:G TR
MT48V8M16LFB4-8 IT:G TR | |
|---|---|
| Manufacturer Part Number | MT48V8M16LFB4-8 IT:G TR |
| Description | IC SDRAM 128MBIT 125MHZ 54VFBGA |
| Manufacturer | Micron Technology Inc |
| MT48V8M16LFB4-8 IT:G TR datasheets |
|
Availability: By request
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Warranty: 60 days
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Specifications of MT48V8M16LFB4-8 IT:G TR | |||
|---|---|---|---|
| Format - Memory | RAM | Memory Type | Mobile SDRAM |
| Memory Size | 128M (8Mx16) | Speed | 125MHz |
| Interface | Parallel | Voltage - Supply | 2.3 V ~ 2.7 V |
| Operating Temperature | -40°C ~ 85°C | Package / Case | 54-VFBGA |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | ||
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Operating Mode
The normal operating mode is selected by setting M7, M8, M10, and M11 to zero; all the
other combinations of values for M7, M8, M10, and M11 are reserved for future use and/
or test modes.
Test modes and reserved states should not be used because unknown operation or
incompatibility with future versions may result.
Extended Mode Register
The extended mode register controls the functions beyond those controlled by the mode
register. These additional functions are special features of the Mobile device. They
include TCSR and PASR.
Figure 9:
Extended Mode Register
E13
E12
Mode Register Definition
0
0
Mode Register
0
1
Reserved
1
0
Extended Mode
Register
1
1
Resereved
E11
E10
E9
E8
E7
E6
E5
0
0
0
0
0
0
0
–
–
–
–
–
–
Notes:
1. E13 and E12 (BA1 and BA0) must be “1, 0” to select the extended mode register (vs. the
base mode register).
2. RFU: reserved for future use.
The extended mode register is programmed via the MODE REGISTER SET command
(BA1 = 1, BA0 = 0) and retains the stored information until it is programmed again or the
device loses power.
The extended mode register must be programmed with E5 through E11 set to “0.” The
extended mode register must be loaded when all banks are idle and no bursts are in
progress, and the controller must wait the specified time before initiating any subse-
quent operation. Violating either of these requirements results in unspecified operation.
The extended mode register must be programmed to ensure proper operation.
Temperature-Compensated Self Refresh (TCSR)
TCSR allows the controller to program the refresh interval during self refresh mode,
according to the case temperature of the Mobile device. This allows great power savings
during self refresh during most operating temperature ranges. Only during extreme
temperatures would the controller have to select a higher TCSR level that will guarantee
data during self refresh.
PDF: 09005aef807f4885/Source: 09005aef8071a76b
128Mbx16x32Mobile_2.fm - Rev. M 1/09 EN
BA1 BA0
A11
A10
A9
A8
A7
A6
A5
A4
A3
E13 E12
E11
E10
E9
E8
E7
E6
E5
E4
E3
13
12
11
10
9
8
7
6
5
4
3
EMR
set to “0”
TCSR
Maximum Case Temp.
E4
E3
85°C
1
1
70°C
0
0
45°C
0
1
15°C
1
0
E4 E3 E2 E1 E0
Operating Mode
Valid
Normal Operation
–
–
All other states reserved
21
128Mb: x16, x32 Mobile SDRAM
Register Definition
A2
A1
A0
E2
E1
E0
Extended Mode
2
1
0
Register (Ex)
PASR
Partial-Array Self Refresh Coverage
E2
FullArray (All Banks)
0
Half Array (BA1 = 0)
0
Quarter Array (BA1 = BA0 = 0)
0
RFU
0
RFU
1
RFU
1
RFU
1
RFU
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001 Micron Technology, Inc. All rights reserved.
E1
E0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
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