M28W160CB70N6F NUMONYX, M28W160CB70N6F Datasheet

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M28W160CB70N6F

Manufacturer Part Number
M28W160CB70N6F
Description
IC FLASH 16MBIT 70NS 48TSOP
Manufacturer
NUMONYX
Datasheet

Specifications of M28W160CB70N6F

Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
16M (1M x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M28W160CB70N6F
Manufacturer:
ST
Quantity:
3 000
FEATURES SUMMARY
January 2006
SUPPLY VOLTAGE
– V
– V
– V
ACCESS TIME: 70, 85, 90,100ns
PROGRAMMING TIME:
– 10µs typical
– Double Word Programming Option
COMMON FLASH INTERFACE
– 64 bit Security Code
MEMORY BLOCKS
– Parameter Blocks (Top or Bottom location)
– Main Blocks
BLOCK LOCKING
– All blocks locked at Power Up
– Any combination of blocks can be locked
– WP for Block Lock-Down
SECURITY
– 64 bit user Programmable OTP cells
– 64 bit unique device identifier
– One Parameter Block Permanently Lockable
AUTOMATIC STAND-BY MODE
PROGRAM and ERASE SUSPEND
100,000 PROGRAM/ERASE CYCLES per
BLOCK
ECOPACK
DD
DDQ
PP
= 12V for fast Program (optional)
= 2.7V to 3.6V Core Power Supply
= 1.65V to 3.6V for Input/Output
®
PACKAGES AVAILABLE
Figure 1. Packages
Table 1. Device Codes
16 Mbit (1Mb x16, Boot Block)
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
Root Part Number
M28W160CT
M28W160CB
3V Supply Flash Memory
TFBGA46 (ZB)
6.39 x 6.37mm
TSOP48 (N)
12 x 20mm
M28W160CB
M28W160CT
FBGA
Device Code
88CEh
88CFh
1/50

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M28W160CB70N6F Summary of contents

Page 1

... PROGRAM and ERASE SUSPEND 100,000 PROGRAM/ERASE CYCLES per BLOCK ® ECOPACK PACKAGES AVAILABLE January 2006 M28W160CT M28W160CB 16 Mbit (1Mb x16, Boot Block) 3V Supply Flash Memory Figure 1. Packages FBGA TFBGA46 (ZB) 6.39 x 6.37mm TSOP48 ( 20mm ELECTRONIC SIGNATURE – Manufacturer Code: 20h Table 1. Device Codes ...

Page 2

... SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Figure 3. TSOP Connections Figure 4. TFBGA Connections (Top view through package Figure 5. Block Addresses Figure 6. Security Block and Protection Register Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 SIGNAL DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Address Inputs (A0-A19 Data Input/Output (DQ0-DQ15 Chip Enable (E Output Enable (G Write Enable (W) ...

Page 3

Table 4. Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 4

M28W160CT, M28W160CB PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

Page 5

... The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. The memory is offered in TSOP48 (10 X 20mm) and TFBGA46 (6.39 x 6.37mm, 0.75mm pitch) packages and is supplied with all the bits erased (set to ’1’). ...

Page 6

M28W160CT, M28W160CB Figure 2. Logic Diagram DDQ A0-A19 W E M28W160CT M28W160CB Figure 3. TSOP Connections 6/50 Table 2. Signal Names A0-A19 DQ0-DQ15 16 E DQ0-DQ15 ...

Page 7

Figure 4. TFBGA Connections (Top view through package A13 B A14 C A15 D A16 E V DDQ A11 A10 W RP A18 A12 A9 DQ14 DQ5 ...

Page 8

... KWords F0000 0FFFF 32 KWords 08000 07FFF 32 KWords 00000 Note: Also see Appendix A, Tables 24 and 25 for a full listing of the Block Addresses. Figure 6. Security Block and Protection Register Memory Map SECURITY BLOCK Parameter Block # 0 8/50 M28W160CB Bottom Boot Block Addresses FFFFF 32 KWords F8000 ...

Page 9

... Register and Protection Register Lock). Reset (RP). The Reset input provides a hard- ware reset of the memory. When Reset the memory is in reset mode: the outputs are high impedance and the current consumption is mini- mized. After Reset all blocks are in the Locked state ...

Page 10

... Disable, Standby, Automatic Standby and Re- set. See Table 3, Bus Operations, for a summary. Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by the memory and do not affect bus operations. Read. Read Bus operations are used to output the contents of the Memory Array, the Electronic Signature, the Status Register and the Common Flash Interface ...

Page 11

... COMMAND INTERFACE All Bus Write operations to the memory are inter- preted by the Command Interface. Commands consist of one or more sequential Bus Write oper- ations. An internal Program/Erase Controller han- dles all timings and verifies the correct execution of the Program and Erase commands. The Pro- ...

Page 12

... Program- ming aborts if Reset goes to V cannot be guaranteed when the program opera- tion is aborted, the block containing the memory location must be erased and reprogrammed. See Appendix C, Figure 18, Double Word Pro- gram Flowchart and Pseudo Code, for the flow- chart for using the Double Word Program command ...

Page 13

The Protection Register Program cannot be sus- pended. See Appendix C, Figure 23, Protection Register Program Flowchart and Pseudo Code, for the flowchart for using the Protection Register Program command. Block Lock Command The Block Lock command is used to ...

Page 14

... M28W160CT, M28W160CB Table 4. Commands No. of Commands Cycles Read Memory Array 1+ Read Status Register 1+ Read Electronic Signature 1+ Read CFI Query 1+ Erase 2 Program 2 (3) 3 Double Word Program Clear Status Register 1 Program/Erase Suspend 1 Program/Erase Resume 1 Block Lock 2 Block Unlock 2 Block Lock-Down 2 Protection Register 2 Program Note: 1 ...

Page 15

Table 6. Read Block Lock Signature Block Status Locked Block IL IL Unlocked Block Locked-Down Block Note Locked-Down Block can be locked "DQ0 = 1" or ...

Page 16

M28W160CT, M28W160CB BLOCK LOCKING The M28W160C features an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency. This locking scheme has three levels of protection. Lock/Unlock - this first level allows software- ...

Page 17

Table 9. Block Lock Status Item Block Lock Configuration Block is Unlocked Block is Locked Block is Locked-Down Table 10. Protection Status Current (1) Protection Status (WP, DQ1, DQ0) Program/Erase Current State Allowed 1,0,0 yes (2) no 1,0,1 1,1,0 yes ...

Page 18

... When the Erase Suspend Status bit is High (set to ‘1’), a Program/Erase Suspend command has been issued and the memory is waiting for a Pro- gram/Erase Resume command. The Erase Suspend Status should only be consid- ered valid when the Program/Erase Controller Sta- tus bit is High (Program/Erase Controller inactive). Bit 7 is set within 30µ ...

Page 19

... Controller Status bit is High (Program/ Erase Controller inactive). Bit 2 is set within 5µs of the Program/Erase Suspend command being is- sued therefore the memory may still complete the operation rather than entering the Suspend mode. When a Program/Erase Resume command is is- sued the Program Suspend Status bit returns Low. ...

Page 20

M28W160CT, M28W160CB MAXIMUM RATING Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause per- manent damage to the device. These are stress ratings only and operation of the device at these or any other ...

Page 21

DC AND AC PARAMETERS This section summarizes the operating and mea- surement conditions, and the DC and AC charac- teristics of the device. The parameters in the DC and AC characteristics Tables that follow, are de- rived from tests performed ...

Page 22

M28W160CT, M28W160CB Table 15. DC Characteristics Symbol Parameter I Input Leakage Current LI I Output Leakage Current LO I Supply Current (Read) DD Supply Current (Stand- DD1 Automatic Stand-by) Supply Current I DD2 (Reset) I Supply Current (Program) ...

Page 23

Figure 9. Read Mode AC Waveforms A0-A19 E G DQ0-DQ15 ADDR. VALID CHIP ENABLE Table 16. Read AC Characteristics Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ACC ...

Page 24

M28W160CT, M28W160CB Figure 10. Write AC Waveforms, Write Enable Controlled 24/50 ...

Page 25

Table 17. Write AC Characteristics, Write Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Write Enable High AVWH Data Valid to Write Enable High DVWH Chip ...

Page 26

M28W160CT, M28W160CB Figure 11. Write AC Waveforms, Chip Enable Controlled 26/50 ...

Page 27

Table 18. Write AC Characteristics, Chip Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Chip Enable High AVEH Data Valid to Chip Enable High DVEH Chip ...

Page 28

M28W160CT, M28W160CB Figure 12. Power-Up and Reset AC Waveforms tVDHPH VDD, VDDQ Table 19. Power-Up and Reset AC Characteristics Symbol Parameter t PHWL Reset High to Write Enable Low, Chip t PHEL Enable Low, Output Enable ...

Page 29

PACKAGE MECHANICAL Figure 13. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, Package Outline DIE Note: Drawing is not to scale. Table 20. TSOP48 - 48 lead Plastic Thin Small Outline, 12 ...

Page 30

M28W160CT, M28W160CB Figure 14. TFBGA46 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Bottom View Package Outline BALL "A1" A Drawing is not to scale. Table 21. TFBGA46 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Package Mechanical ...

Page 31

Figure 15. TFBGA46 Daisy Chain - Package Connections (Top view through package Figure 16. TFBGA46 Daisy Chain - PCB Connections proposal (Top view through package ...

Page 32

M28W160CT, M28W160CB PART NUMBERING Table 22. Ordering Information Scheme Example: Device Type M28 Operating Voltage 2.7V to 3.6V 1.65V to 3.6V DD DDQ Device Function 160C = 16 Mbit (1 Mb x16), Boot Block ...

Page 33

... S = Tape & Reel Packing U = ECOPACK Package, Tape & Reel Packing Note:Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc.) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you. ...

Page 34

M28W160CT, M28W160CB APPENDIX A. BLOCK ADDRESS TABLES Table 24. Top Boot Block Addresses, M28W160CT Size # Address Range (KWord FF000-FFFFF 1 4 FE000-FEFFF 2 4 FD000-FDFFF 3 4 FC000-FCFFF 4 4 FB000-FBFFF 5 4 FA000-FAFFF 6 4 F9000-F9FFF ...

Page 35

... Note: Query data are always presented on the lowest order data outputs (DQ7-DQ0) only. DQ8-DQ15 are ‘0’. M28W160CT, M28W160CB structure is read from the memory. Tables 26, 27, 28, 29, 30 and 31 show the addresses used to re- trieve the data. The CFI data structure also contains a security area where a 64 bit unique security number is writ- ten (see Table 31, Security Code area) ...

Page 36

M28W160CT, M28W160CB Table 28. CFI Query System Interface Information Offset Data V Logic Supply Minimum Program/Erase or Write voltage DD 1Bh 0027h V Logic Supply Maximum Program/Erase or Write voltage DD 1Ch 0036h V [Programming] Supply Minimum Program/Erase voltage PP ...

Page 37

Table 29. Device Geometry Definition Offset Word Data Mode 27h 0015h Device Size = 2 28h 0001h Flash Device Interface Code description 29h 0000h 2Ah 0002h Maximum number of bytes in multi-byte program or page = 2 2Bh 0000h Number ...

Page 38

M28W160CT, M28W160CB Table 30. Primary Algorithm-Specific Extended Query Table Offset Data ( 35h (P+0)h = 35h 0050h (P+1)h = 36h 0052h Primary Algorithm extended Query table unique ASCII string “PRI” (P+2)h = 37h 0049h (P+3)h = 38h 0031h ...

Page 39

Table 31. Security Code Area Offset Data 80h 00XX Protection Register Lock 81h XXXX 82h XXXX 64 bits: unique device number 83h XXXX 84h XXXX 85h XXXX 86h XXXX 64 bits: User Programmable OTP 87h XXXX 88h XXXX M28W160CT, M28W160CB ...

Page 40

... If an error is found, the Status Register must be cleared before further Program/Erase Controller operations. 40/50 program_command (addressToProgram, dataToProgram) {: writeToFlash (any_address, 0x40) ; /*or writeToFlash (any_address, 0x10 writeToFlash (addressToProgram, dataToProgram) ; /*Memory enters read status state after the Program Command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register ...

Page 41

... If an error is found, the Status Register must be cleared before further Program/Erase operations. 3. Address 1 and Address 2 must be consecutive addresses differing only for bit A0. double_word_program_command (addressToProgram1, dataToProgram1, { writeToFlash (any_address, 0x30) ; writeToFlash (addressToProgram1, dataToProgram1) ; writeToFlash (addressToProgram2, dataToProgram2) ; /*Memory enters read status state after the Program command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register ...

Page 42

M28W160CT, M28W160CB Figure 19. Program Suspend & Resume Flowchart and Pseudo Code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another address Write D0h Program Continues 42/50 ...

Page 43

... End Note error is found, the Status Register must be cleared before further Program/Erase operations. erase_command ( blockToErase ) { writeToFlash (any_address, 0x20) ; writeToFlash (blockToErase, 0xD0 only A12-A20 are significannt */ /* Memory enters read status state after the Erase Command */ do { status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register ...

Page 44

M28W160CT, M28W160CB Figure 21. Erase Suspend & Resume Flowchart and Pseudo Code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another block or Program/Protection Program or Block ...

Page 45

Figure 22. Locking Operations Flowchart and Pseudo Code Start Write 60h Write 01h, D0h or 2Fh Write 90h Read Block Lock States Locking change confirmed? YES Write FFh End locking_operation_command (address, lock_operation) { writeToFlash (any_address, 0x60) ; /*configuration setup*/ if ...

Page 46

... Note: 1. Status check of b1 (Protected Block sequence error is found, the Status Register must be cleared before further Program/Erase Controller operations. 46/50 protection_register_program_command (addressToProgram, dataToProgram) {: writeToFlash (any_address, 0xC0) ; writeToFlash (addressToProgram, dataToProgram) ; /*Memory enters read status state after the Program Command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register ...

Page 47

APPENDIX D. COMMAND INTERFACE AND PROGRAM/ERASE CONTROLLER STATE Table 32. Write State Machine Current/Next, sheet Data Current SR Read When State bit 7 Array Read (FFh) Read Array “1” Array Read Array Prog.Setup Read “1” Status Read ...

Page 48

M28W160CT, M28W160CB Table 33. Write State Machine Current/Next, sheet Current State Read Elect.Sg. (90h) Read Array Read Elect.Sg. Read CFI Query Read Status Read Elect.Sg. Read CFI Query Read Elect.Sg. Read Elect.Sg. Read CFI Query Read CFI ...

Page 49

REVISION HISTORY Table 34. Document Revision History Date Version January 2001 -01 3/06/01 -02 24-Apr-2001 -03 29-May-2001 -04 31-May-2001 -05 02-Jul-2001 -06 31-Oct-2001 -07 16-May-2002 -08 19-Feb-2003 8.1 04-Oct-2005 9.0 20-Jan-2006 10.0 Revision Details First Issue Document type: from Preliminary ...

Page 50

M28W160CT, M28W160CB Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from ...

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