M28W320FCT70N6F NUMONYX, M28W320FCT70N6F Datasheet

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M28W320FCT70N6F

Manufacturer Part Number
M28W320FCT70N6F
Description
IC FLASH 32MBIT 70NS 48TSOP
Manufacturer
NUMONYX
Datasheet

Specifications of M28W320FCT70N6F

Format - Memory
FLASH
Memory Type
FLASH - Nor
Memory Size
32M (2M x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
M28W320FCT70N6F
Manufacturer:
STM
Quantity:
728
Features
November 2008
Supply Voltage
– V
– V
– V
Access Time: 70, 80, 90, 100ns
Programming Time
– 10μs typical
– Double Word Programming Option
– Quadruple Word Programming Option
Common Flash Interface
Memory Blocks
– Parameter Blocks (Top or Bottom location)
– Main Blocks
Block Locking
– All blocks locked at Power Up
– Any combination of blocks can be locked
– WP for Block Lock-Down
Security
– 128 bit user Programmable OTP cells
– 64 bit unique device identifier
Automatic Stand-by mode
Program and Erase Suspend
100,000 Program/Erase cycles per block
Electronic Signature
– Manufacturer Code: 20h
– Top Device Code, M28W320FCT: 88BAh
– Bottom Device Code, M28W320FCB:
RoHS compliant packages
88BBh
DD
DDQ
PP
= 12V for fast Program (optional)
= 2.7V to 3.6V Core Power Supply
= 1.65V to 3.6V for Input/Output
208010-05
32 Mbit (2Mb x16, Boot Block)
3V Supply Flash Memory
TFBGA47 (ZB)
6.39 x 6.37mm
TSOP48 (N)
12 x 20mm
M28W320FCB
M28W320FCT
FBGA
www.numonyx.com
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M28W320FCT70N6F Summary of contents

Page 1

... Electronic Signature – Manufacturer Code: 20h – Top Device Code, M28W320FCT: 88BAh – Bottom Device Code, M28W320FCB: 88BBh RoHS compliant packages November 2008 M28W320FCT M28W320FCB 32 Mbit (2Mb x16, Boot Block) 3V Supply Flash Memory FBGA TFBGA47 (ZB) 6.39 x 6.37mm TSOP48 ( 20mm 208010-05 1/69 1 www.numonyx.com ...

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... Output Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.4 Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.5 Automatic Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.6 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 Command interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 Read Memory Array command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 Read Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 Read Electronic Signature command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.4 Read CFI Query command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.5 Block Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.6 Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.7 Double Word Program command ...

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Clear Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.10 Program/Erase ...

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Appendix C Flowcharts and pseudo codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56 Appendix D Command interface ...

Page 5

List of tables Table 1. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...

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... Figure 1. Logic Diagram Figure 2. TSOP Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Figure 3. TFBGA Connections (Top view through package Figure 4. Block Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 5. Protection Register Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Figure 6. AC Measurement I/O Waveform Figure 7. AC Measurement Load Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 Figure 8. Read AC Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 9. Write AC Waveforms, Write Enable Controlled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 10. ...

Page 7

... The device includes a Protection Register to increase the protection of a system design. The Protection Register is divided into two segments, the first bit area which contains a unique device number written by Numonyx, while the second is a 128 bit area, one-time- programmable by the user. The user programmable segment can be permanently protected ...

Page 8

Figure 1. Logic Diagram Table 1. Signal Names A0-A20 DQ0-DQ15 DDQ 8/ DDQ A0-A20 W E M28W320FCT M28W320FCB G RP ...

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Figure 2. TSOP Connections A15 A14 A13 A12 A11 A10 A20 A19 A18 A17 A16 V DDQ V SS DQ15 DQ7 DQ14 DQ6 DQ13 ...

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Figure 3. TFBGA Connections (Top view through package A13 A11 B A14 A10 C A15 A12 D A16 DQ14 E V DDQ DQ15 DQ7 10/ A18 ...

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... KWords 000000 1. Also see and Appendix A, Table 24 Figure 5. Protection Register Memory Map 8Ch User Programmable OTP 85h 84h 81h Protection Register Lock 80h Note1. Bit 2 of the Protection Register Lock must not be programmed to 0. M28W320FCB Bottom Boot Block Addresses ...

Page 12

... Figure 1: Logic Diagram connected to this device. 2.1 Address inputs (A0-A20) The Address Inputs select the cells in the memory array to access during Bus Read operations. During Bus Write operations they control the commands sent to the Command Interface of the internal state machine. 2.2 ...

Page 13

... Chip Enable or a change of the address is required to ensure valid data outputs. 2.8 V supply voltage DD V provides the power supply to the internal core of the memory device the main DD power supply for all operations (Read, Program and Erase). 2.9 V supply voltage DDQ ...

Page 14

... Read Read Bus operations are used to output the contents of the Memory Array, the Electronic Signature, the Status Register and the Common Flash Interface. Both Chip Enable and Output Enable must should be used to enable the device. Output Enable should be used to gate data onto the output ...

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... Reset During Reset mode when Output Enable is Low, V outputs are high impedance. The memory is in Reset mode when Reset consumption is reduced to the Standby level, independently from the Chip Enable, Output Enable or Write Enable inputs. If Reset is pulled to V operation is aborted and the memory content is no longer valid. ...

Page 16

... Read Memory Array command The Read command returns the memory to its Read mode. One Bus Write cycle is required to issue the Read Memory Array command and return the memory to Read mode. Subsequent read operations will read the addressed location and output the data. When a device Reset occurs, the memory defaults to Read mode ...

Page 17

... Read CFI Query command The Read Query Command is used to read data from the Common Flash Interface (CFI) Memory Area, allowing programming equipment or applications to automatically match their interface to the characteristics of the device. One Bus Write cycle is required to issue the Read Query Command. Once the command is issued subsequent Bus Read operations read from the Common Flash Interface Memory Area ...

Page 18

... During Program operations the memory will accept the Read Status Register command and the Program/Erase Suspend command. Typical Program times are given in Program, Erase Times and Program/Erase Endurance Programming aborts if Reset goes to V program operation is aborted, the block containing the memory location must be erased and reprogrammed. See Appendix ...

Page 19

... The fifth bus cycle latches the Address and the Data of the fourth word to be written and starts the Program/Erase Controller. Read operations output the Status Register content after the programming has started. Programming aborts if Reset goes to V program operation is aborted, the block containing the memory location must be erased and reprogrammed. See Appendix ...

Page 20

... Read operations output the Status Register content after the programming has started. The segment can be protected by programming bit 1 of the Protection Lock Register (see Figure 5: Protection Register Memory Protection Register will result in a Status Register error. The protection of the Protection Register is not reversible. ...

Page 21

Block Lock command The Block Lock command is used to lock a block and prevent Program or Erase operations from changing the data in it. All blocks are locked at power-up or reset. Two Bus Write cycles are required ...

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... Table 4. Commands Commands 1st Cycle Op Add Read Memory 1+ Write X Array Read Status 1+ Write X Register Read Electronic 1+ Write X Signature Read CFI Query 1+ Write X Erase 2 Write X Program 2 Write X Double Word 3 Write X (4) Program Quadruple Word 5 Write X (5) Program Clear Status 1 Write X Register ...

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Table 5. Read Electronic Signature Code Device Manufacture. V Code M28W320FCT V Device Code M28W320FCB Table 6. Read Block Lock Signature Block Status Locked Block ...

Page 24

Table 8. Program, Erase Times and Program/Erase Endurance Cycles Parameter Word Program Double Word Program Quadruple Word Program Main Block Program Parameter Block Program Main Block Erase Parameter Block Erase Program/Erase Cycles (per Block) Data Retention 1. Typical time to ...

Page 25

Block locking The M28W320FCT and M28W320FCB feature an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency. This locking scheme has three levels of protection. Lock/Unlock - this first level allows ...

Page 26

Lock-Down state Blocks that are Locked-Down (state (0,1,x))are protected from program and erase operations (as for Locked blocks) but their protection status cannot be changed using software commands alone. A Locked or Unlocked block can be Locked-Down by issuing ...

Page 27

Table 10. Protection Status (1) Current Protection Status (WP, DQ1, DQ0) Program/Erase Current State Allowed 1,0,0 yes (2) 1,0,1 no 1,1,0 yes 1,1,1 no 0,0,0 yes (2) 0,0,1 no 0,1 The lock status is defined by the write ...

Page 28

... The Erase Suspend Status bit indicates that an Erase operation has been suspended or is going to be suspended. When the Erase Suspend Status bit is High (set to ‘1’), a Program/Erase Suspend command has been issued and the memory is waiting for a Program/Erase Resume command. The Erase Suspend Status should only be considered valid when the Program/Erase Controller Status bit is High (Program/Erase Controller inactive). Bit 7 is set within 30μ ...

Page 29

... Erase Status (Bit 5) The Erase Status bit can be used to identify if the memory has failed to verify that the block has erased correctly. When the Erase Status bit is High (set to ‘1’), the Program/Erase Controller has applied the maximum number of pulses to the block and still failed to verify that the block has erased correctly ...

Page 30

Block Protection Status (Bit 1) The Block Protection Status bit can be used to identify if a Program or Erase operation has tried to modify the contents of a locked block. When the Block Protection Status bit is High ...

Page 31

... These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the Numonyx SURE Program and other relevant quality documents. Table 12. ...

Page 32

DC and AC parameters This section summarizes the operating and measurement conditions, and the DC and AC characteristics of the device. The parameters in the DC and AC characteristics Tables that follow are derived from tests performed under the ...

Page 33

Figure 7. AC Measurement Load Circuit V DDQ 0.1µF (1) Table 14. Capacitance Symbol Parameter C Input Capacitance IN C Output Capacitance OUT 1. Sampled only, not 100% tested. Table 15. DC Characteristics Symbol Parameter I Input Leakage Current LI ...

Page 34

Table 15. DC Characteristics (continued) Symbol Parameter Program Current I PP1 (Read or Stand-by) I Program Current (Reset) PP2 I Program Current (Program) PP3 I Program Current (Erase) PP4 V Input Low Voltage IL V Input High Voltage IH V ...

Page 35

Figure 8. Read AC Waveforms A0-A20 E G DQ0-DQ15 ADDR. VALID CHIP ENABLE Table 16. Read AC Characteristics Symbol Alt t t Address Valid to Next Address Valid AVAV Address Valid to Output Valid AVQV ACC (1) ...

Page 36

Figure 9. Write AC Waveforms, Write Enable Controlled 36/69 ...

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Table 17. Write AC Characteristics, Write Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Write Enable High AVWH Data Valid to Write Enable High DVWH Chip ...

Page 38

Figure 10. Write AC Waveforms, Chip Enable Controlled 38/69 ...

Page 39

Table 18. Write AC Characteristics, Chip Enable Controlled Symbol Alt t t Write Cycle Time AVAV Address Valid to Chip Enable High AVEH Data Valid to Chip Enable High DVEH DS Chip Enable High ...

Page 40

Figure 11. Power-Up and Reset AC Waveforms tVDHPH VDD, VDDQ Power-Up Table 19. Power-Up and Reset AC Characteristics Symbol Parameter t PHWL Reset High to Write Enable Low, Chip t PHEL Enable Low, Output Enable Low ...

Page 41

Package mechanical Figure 12. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, Package Outline 1 N/2 TSOP-a 1. Drawing is not to scale. Table 20. TSOP48 - 48 lead Plastic Thin Small Outline 20mm, ...

Page 42

Figure 13. TFBGA47 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Bottom View Package Outline BALL "A1" Drawing is not to scale. Table 21. TFBGA47 6.39x6.37mm - 8x6 ball array, 0.75mm pitch, Package Mechanical ...

Page 43

Figure 14. TFBGA47 Daisy Chain - Package Connections (Top view through package Figure 15. TFBGA47 Daisy Chain - PCB Connections proposal (Top view through package ...

Page 44

Part numbering Table 22. Ordering Information Scheme Example: Device Type M28 Operating Voltage 2.7V to 3.6V Device Function 320FC = 32 Mbit (2 Mb x16), Boot Block Array Matrix T = Top Boot ...

Page 45

... F = RoHS compliant Package, Tape & Reel 24mm Packing Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (Speed, Package, etc.) or for further information on any aspect of this device, please contact the Numonyx Sales Office nearest to you. -ZB E ...

Page 46

Appendix A Block address tables Table 24. Top Boot Block Addresses, M28W320FCT # ...

Page 47

Table 24. Top Boot Block Addresses, M28W320FCT (continued ...

Page 48

Table 24. Top Boot Block Addresses, M28W320FCT (continued Table 25. Bottom Boot Block Addresses, M28W320FCB # ...

Page 49

Table 25. Bottom Boot Block Addresses, M28W320FCB (continued ...

Page 50

Table 25. Bottom Boot Block Addresses, M28W320FCB (continued 50/69 Size (KWord) Address Range 4 007000-007FFF 4 006000-006FFF 4 005000-005FFF 4 004000-004FFF 4 003000-003FFF 4 002000-002FFF 4 001000-001FFF 4 000000h - 000FFFh ...

Page 51

... The CFI data structure also contains a security area where a 64 bit unique security number is written (see Table 31: Security Code mode by the final user impossible to change the security number after it has been written by Numonyx. Issue a Read command to return to Read mode. Table 26. Query Structure Overview Offset ...

Page 52

Table 27. CFI Query Identification String Offset Data 17h 0000h Alternate Vendor Command Set and Control Interface ID Code second vendor - specified algorithm supported (0000h means none exists) 18h 0000h 19h 0000h Address for Alternate Algorithm extended Query table ...

Page 53

Table 29. Device Geometry Definition Offset Word Data Mode 27h 0016h Device Size = 2 28h 0001h Flash Device Interface Code description 29h 0000h 2Ah 0003h Maximum number of bytes in multi-byte program or page = 2 2Bh 0000h Number ...

Page 54

Table 30. Primary Algorithm-Specific Extended Query Table Offset Data ( 35h (P+0)h = 35h 0050h (P+1)h = 36h 0052h Primary Algorithm extended Query table unique ASCII string “PRI” (P+2)h = 37h 0049h (P+3)h = 38h 0031h Major version ...

Page 55

Table 30. Primary Algorithm-Specific Extended Query Table Offset Data ( 35h (P+F)h = 44h 0080h Protection Field 1: Protection Description This field describes user-available. One Time Programmable (OTP) (P+10)h = 45h 0000h Protection register bytes. Some are pre-programmed ...

Page 56

... If an error is found, the Status Register must be cleared before further Program/Erase Controller operations. 56/69 program_command (addressToProgram, dataToProgram) {: writeToFlash (any_address, 0x40) ; /*or writeToFlash (any_address, 0x10 writeToFlash (addressToProgram, dataToProgram) ; /*Memory enters read status state after the Program Command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register ...

Page 57

... If an error is found, the Status Register must be cleared before further Program/Erase operations. 3. Address 1 and Address 2 must be consecutive addresses differing only for bit A0. double_word_program_command (addressToProgram1, dataToProgram1, { writeToFlash (any_address, 0x30) ; writeToFlash (addressToProgram1, dataToProgram1) ; writeToFlash (addressToProgram2, dataToProgram2) ; /*Memory enters read status state after the Program command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register ...

Page 58

... Program command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ...

Page 59

Figure 19. Program Suspend & Resume Flowchart and Pseudo Code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another address Write D0h Program Continues program_suspend_command ...

Page 60

... End error is found, the Status Register must be cleared before further Program/Erase operations. 60/69 erase_command ( blockToErase ) { writeToFlash (any_address, 0x20) ; writeToFlash (blockToErase, 0xD0 only A12-A20 are significannt */ /* Memory enters read status state after the Erase Command */ do { status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 Invalid if (status_register ...

Page 61

Figure 21. Erase Suspend & Resume Flowchart and Pseudo Code Start Write B0h Write 70h Read Status Register YES YES Write FFh Read data from another block or Program/Protection Program or Block ...

Page 62

Figure 22. Locking Operations Flowchart and Pseudo Code Start Write 60h Write 01h, D0h or 2Fh Write 90h Read Block Lock States NO Locking change confirmed? YES Write FFh End 62/69 locking_operation_command (address, lock_operation) { writeToFlash (any_address, 0x60) ; /*configuration ...

Page 63

... Status check of b1 (Protected Block after a sequence error is found, the Status Register must be cleared before further Program/Erase Controller operations. protection_register_program_command (addressToProgram, dataToProgram) {: writeToFlash (any_address, 0xC0) ; writeToFlash (addressToProgram, dataToProgram) ; /*Memory enters read status state after the Program Command status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 ...

Page 64

Appendix D Command interface and Program/Erase Controller state Table 32. Write State Machine Current/Next, sheet Data Current State When Read bit Read Array 7 (FFh) Read Read Array “1” Array Array Read Read Status “1” Status ...

Page 65

Table 32. Write State Machine Current/Next, sheet Data Current State When Read bit Read Array 7 (FFh) Erase Setup “1” Status Erase Read “1” Status Cmd.Error Array Erase “0” Status (continue) Erase Sus Erase Sus “1” ...

Page 66

Table 33. Write State Machine Current/Next, sheet Read Read CFI Current State Elect.Sg. Query (90h) Read Read CFI Read Array Elect.Sg. Query Read Read CFI Read Status Elect.Sg. Query Read Read CFI Read Elect.Sg. Elect.Sg. Query Read ...

Page 67

Table 33. Write State Machine Current/Next, sheet (continued) Read Read CFI Current State Elect.Sg. Query (90h) Erase (continue) Erase Erase Erase Suspend Suspend Suspend Read Read CFI Read Ststus Elect.Sg. Query Erase Erase Erase Suspend Suspend Read ...

Page 68

... Controlled, and Table 19: Power-Up and Reset AC Characteristics updated. Table 22: Ordering Information Scheme Device function updated remove the 0.13μm technology. 4 Applied Numonyx branding. Added row #70 to Table 24: Top Boot Block Addresses, M28W320FCT; added row # Addresses, M28W320FCB. Replaced references to ECOPACK with RoHS compliant. ...

Page 69

... NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems nuclear facility Numonyx may make changes to specifications and product descriptions at any time, without notice. ...

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