N25Q128A11TF840F

Manufacturer Part NumberN25Q128A11TF840F
DescriptionIC SRL FLASH 128MB NMX 8-VDFPN
ManufacturerNUMONYX
SeriesForté™
N25Q128A11TF840F datasheets

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Specifications of N25Q128A11TF840F

Format - MemoryFLASHMemory TypeFLASH
Memory Size128M (16M x 8)Speed108MHz
InterfaceSPI, 3-Wire SerialVoltage - Supply1.7 V ~ 2 V
Operating Temperature-40°C ~ 85°CPackage / Case*
Lead Free Status / RoHS StatusLead free / RoHS Compliant  
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Figure 52. Program OTP instruction sequence DIO-SPI
S
0
1
2
3
4
C
Instruction
22 20 18 16
DQ0
23 21 19 17
DQ1
9.2.8
Subsector Erase (SSE)
For devices with bottom or top architecture, at the bottom (or top) of the addressable area
there are 8 boot sectors, each one having 16 4Kbytes subsectors. The Subsector Erase
(SSE) instruction sets to '1' (FFh) all bits inside the chosen subsector. Before it can be
accepted, a Write Enable (WREN) instruction must previously have been executed.
Apart form the parallelizing of the instruction code and the address on the two pins DQ0 and
DQ1, the instruction functionality is exactly the same as the Subsector Erase (SSE)
instruction of the Extended SPI protocol, please refer to
(SSE)
for further details.
Figure 53. Subsector Erase instruction sequence DIO-SPI
S
0
1
C
Instruction
DQ0
DQ1
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5
6
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8
9 10 11
12 13 14 15
24-Bit Address
14 12 10 8
6
4
2
0
7
5
3
1
15 13 11 9
2
3
4
5
6
7
8
24-Bit Address
22 20 18 16
14 12 10
23 21 19 17
15 13 11
16 17 18 19
20 21 22 23 24 25 26 27
Data Byte 1
Data Byte 2
Data Byte n
6
4
2
0
6
4
0
6
4
2
2
7
5
1
3
7
5
3
1
7
5
3
Dual_Program_OTP
Section 9.1.17: Subsector Erase
9
10 11
12 13 14 15
6
4
2
0
8
7
5
3
1
9
Dual_S ubsector_E rase
0
1