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N25Q128A11TF840F
N25Q128A11TF840F | |
|---|---|
| Manufacturer Part Number | N25Q128A11TF840F |
| Description | IC SRL FLASH 128MB NMX 8-VDFPN |
| Manufacturer | NUMONYX |
| Series | Forté™ |
| N25Q128A11TF840F datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
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- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
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Specifications of N25Q128A11TF840F | |||
|---|---|---|---|
| Format - Memory | FLASH | Memory Type | FLASH |
| Memory Size | 128M (16M x 8) | Speed | 108MHz |
| Interface | SPI, 3-Wire Serial | Voltage - Supply | 1.7 V ~ 2 V |
| Operating Temperature | -40°C ~ 85°C | Package / Case | * |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | ||
PrevNext
polling instructions (to check if the internal cycle is finished by mean of the WIP bit of the
Status Register or of the Program/Erase controller bit of the Flag Status register): to verify if
the POR sequence is completed is possible to check the WIP bit in the Status Register or
the Program/Erase Controller bit in the Flag Status Register, please note that the
Program/Erase Controller bit in the Flag status register has the reverse logical polarity with
respect to the Status Register WIP bit.
At the end of the POR sequence the WEL bit is low, so the next modify instruction can be
accepted.
Figure 18. Write Enable instruction sequence
S
C
DQ0
DQ1
9.1.10
Write Disable (WRDI)
The Write Disable (WRDI) instruction (Figure 9) resets the Write Enable Latch (WEL) bit.
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
88/185
0
1
2
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7
Instruction
High Impedance
AI13731
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