IC FLASH 2MBIT 90NS 52PLCC

 

PSD834F2-90J

Manufacturer Part NumberPSD834F2-90J
DescriptionIC FLASH 2MBIT 90NS 52PLCC
ManufacturerSTMicroelectronics
PSD834F2-90J datasheets

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Specifications of PSD834F2-90J

Format - MemoryFLASHMemory TypeFLASH
Memory Size2M (256K x 8)Speed90ns
InterfaceParallelVoltage - Supply4.5 V ~ 5.5 V
Operating Temperature0°C ~ 70°CPackage / Case52-PLCC
Lead Free Status / RoHS StatusContains lead / RoHS non-compliantOther names497-2006-5
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Page 72/109

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PSD813F2V, PSD854F2V
AC/DC PARAMETERS
These tables describe the AD and DC parameters
of the PSD:
❏ DC Electrical Specification
❏ AC Timing Specification
PLD Timing
Combinatorial Timing
Synchronous Clock Mode
Asynchronous Clock Mode
Input Macrocell Timing
MCU Timing
READ Timing
WRITE Timing
Peripheral Mode Timing
Figure 35. PLD I
/Frequency Consumption (5V range)
CC
110
100
V
90
80
70
60
50
40
30
20
10
0
0
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
Figure 36. PLD I
/Frequency Consumption (3V range)
CC
60
V
50
40
30
20
10
0
0
HIGHEST COMPOSITE FREQUENCY AT PLD INPUTS (MHz)
72/109
The following are issues concerning the parame-
ters presented:
In the DC specification the supply current is
given for different modes of operation. Before
calculating the total power consumption,
determine the percentage of time that the PSD
is in each mode. Also, the supply power is
considerably different if the Turbo Bit is ’0.’
The AC power component gives the PLD,
Flash memory, and SRAM mA/MHz
specification. Figures
mA/MHz as a function of the number of
Product Terms (PT) used.
In the PLD timing parameters, add the
required delay when Turbo Bit is ’0.’
= 5V
CC
5
10
15
= 3V
CC
5
10
15
Doc ID 10552 Rev 3
Power-down and Reset Timing
35
and
36
show the PLD
PT 100%
PT 25%
20
25
AI02894
PT 100%
PT 25%
20
25
AI03100