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IDT71V67903S85PFG8
IDT71V67903S85PFG8 | |
|---|---|
| Manufacturer Part Number | IDT71V67903S85PFG8 |
| Description | IC SRAM 9MBIT 85NS 100TQFP |
| Manufacturer | IDT, Integrated Device Technology Inc |
| IDT71V67903S85PFG8 datasheets |
|
Availability: By request
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
×
Shipping terms
- Standard delivery time differs from 5-8 business days if the supplier is a local one to 12-14 days if the suplier is from overseas. If delivery time differs it's always mentioned in our quotation.
- We ship worldwide using main international couriers like FedEx, DHL, UPS, TNT, EMS. We can also use client's freight account. Other shipping methods can be discussed. We do best to meet your needs!
Payment terms
- For new client payment term is payment in advance. At this moment we accept 3 payment methods: wire transfer, PayPal and Western Union. Credit card payment is under constrution and will be introduced soon. Escrow service is acceptable. Net terms for regular customers is not a problem. Working with us is totally safe for you.
- If you still have any questions - please contact us
Specifications of IDT71V67903S85PFG8 | |||
|---|---|---|---|
| Format - Memory | RAM | Memory Type | SRAM - Synchronous |
| Memory Size | 9M (512K x 18) | Speed | 85ns |
| Interface | Parallel | Voltage - Supply | 3.135 V ~ 3.465 V |
| Operating Temperature | 0°C ~ 70°C | Package / Case | 100-TQFP, 100-VQFP |
| Lead Free Status / RoHS Status | Lead free / RoHS Compliant | Other names | 71V67903S85PFG8 |
PrevNext
IDT71V67703, IDT71V67903, 256K x 36, 512K x 18, 3.3V Synchronous SRAMS with
3.3V I/O, Flow-Through Outputs, Single Cycle Deselect
CLK
AD SP
AD SC
ADDRESS
G W , BW E, BW x
CE, CS
1
CS
0
O E
DATA
OUT
NOTES:
1. ZZ input is LOW, ADV is HIGH and LBO is Don't Care for this cycle.
2. (Ax) represents the data for address Ax, etc.
3. For read cycles, ADSP and ADSC function identically and are therefore interchangable.
CLK
AD SP
ADSC
ADDRESS
Av
G W
CE, CS
1
CS
0
DATA
IN
NOTES:
1. ZZ input is LOW, ADV and OE are HIGH, and LBO is Don't Care for this cycle.
2. (Ax) represents the data for address Ax, etc.
3. Although only GW writes are shown, the functionality of BWE and BWx together is the same as GW.
4. For write cycles, ADSP and ADSC have different limitations.
Av
Aw
Ax
(Av)
(Aw)
(Ax)
Aw
(Av)
(Aw)
6.42
18
Commercial and Industrial Temperature Ranges
Ay
Az
(Ay)
,
5309 drw 10
Ax
Ay
Az
(Ax)
(Ay)
(Az)
5309 drw 11
,
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IDT71V67903S75PFGI8 |
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IDT71V67903S80PFGI8 |
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IDT71V67903S85PFGI8 |
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IDT71V67903S75BQ |
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