CAT28F010GI90 ON Semiconductor, CAT28F010GI90 Datasheet

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CAT28F010GI90

Manufacturer Part Number
CAT28F010GI90
Description
IC FLASH 1MBIT 90NS 32PLCC
Manufacturer
ON Semiconductor
Datasheet

Specifications of CAT28F010GI90

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
1M (128K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
CAT28F010GI-90
CAT28F010GI-90

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CAT28F010GI90
Manufacturer:
ON Semiconductor
Quantity:
135
Part Number:
CAT28F010GI90
Manufacturer:
ON Semiconductor
Quantity:
10 000
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
1 Megabit CMOS Flash Memory
FEATURES
DESCRIPTION
The CAT28F010 is a high speed 128K x 8-bit electrically
erasable and reprogrammable Flash memory ideally
suited for applications requiring in-system or after-sale
code updates. Electrical erasure of the full memory
contents is achieved typically within 0.5 second.
It is pin and Read timing compatible with standard
EPROM and EEPROM devices. Programming and
Erase are performed through an operation and verify
algorithm. The instructions are input via the I/O bus,
BLOCK DIAGRAM
Fast read access time: 90/120 ns
Low power CMOS dissipation:
–Active: 30 mA max (CMOS/TTL levels)
–Standby: 1 mA max (TTL levels)
–Standby: 100 A max (CMOS levels)
High speed programming:
–10 s per byte
–2 Sec Typ Chip Program
0.5 seconds typical chip-erase
12.0V
Stop timer for program/erase
A 0 –A 16
5% programming and erase voltage
WE
OE
CE
VOLTAGE VERIFY
SWITCH
COMMAND
REGISTER
PROGRAM VOLTAGE
ERASE VOLTAGE
SWITCH
SWITCH
Y-DECODER
X-DECODER
1
using a two write cycle scheme. Address and Data are
latched to free the I/O bus and address bus during the
write operation.
The CAT28F010 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 32-pin plastic DIP, 32-pin PLCC or 32-pin
TSOP packages.
Commercial, industrial and automotive
temperature ranges
On-chip address and data latches
JEDEC standard pinouts:
–32-pin DIP
–32-pin PLCC
–32-pin TSOP (8 x 20)
100,000 program/erase cycles
10 year data retention
Electronic signature
CE, OE LOGIC
second source
Licensed Intel
LATCH
DATA
I/O BUFFERS
1,048,576 BIT
I/O 0 –I/O 7
Y-GATING
MEMORY
ARRAY
SENSE
AMP
CAT28F010
Doc. No. MD-1019, Rev. G

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CAT28F010GI90 Summary of contents

Page 1

... The CAT28F010 is a high speed 128K x 8-bit electrically erasable and reprogrammable Flash memory ideally suited for applications requiring in-system or after-sale code updates. Electrical erasure of the full memory contents is achieved typically within 0.5 second pin and Read timing compatible with standard EPROM and EEPROM devices. Programming and Erase are performed through an operation and verify algorithm ...

Page 2

... Pin Name A I I/O 7 TSOP Package (Reverse Pinout) (TR, HR) 2 Type Function –A Input Address Inputs for 0 16 memory addressing –I/O I/O Data Input/Output 0 7 Input Chip Enable Input Output Enable Input Write Enable Voltage Supply CC Ground SS Program/Erase PP Voltage Supply ...

Page 3

ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias .................. - +130 C Storage Temperature ........................ - +150 C Voltage on Any Pin with (1) Respect to Ground ............ -2. Voltage on Pin A with 9 (1) ...

Page 4

CAT28F010 D.C. OPERATING CHARACTERISTICS V = +5V 10%, unless otherwise specified. CC Symbol Parameter I Input Leakage Current LI I Output Leakage Current Standby Current CMOS SB1 Standby Current TTL SB2 ...

Page 5

SUPPLY CHARACTERISTICS Symbol V V Supply Voltage During Read Operations PPL During Read/Erase/Program PPH PP A.C. CHARACTERISTICS, Read Operation V = +5V 10%, unless otherwise specified. CC JEDEC Standard Symbol Symbol Parameter t ...

Page 6

CAT28F010 A.C. CHARACTERISTICS, Program/Erase Operation V = +5V 10%, unless otherwise specified. CC \JEDEC Standard Symbol Symbol Parameter t t Write Cycle Time AVAV Address Setup Time AVWL Address Hold Time WLAX AH t ...

Page 7

FUNCTION TABLE Mode CE Read V IL Output Disable V IL Standby V IH Signature (MFG Signature (Device Program/Erase V IL Write Cycle V IL Read Cycle V IL WRITE COMMAND TABLE Commands are written ...

Page 8

... PP be sent before reading data (see Write Operations). The data retrieved from the I/O pins reflects the contents of the memory location corresponding to the state of the 17 address pins. The respective timing waveforms for the read operation are shown in Figure 3. Refer to the AC Read characteristics for specific timing parameters. ...

Page 9

WRITE OPERATIONS The following operations are initiated by observing the sequence specified in the Write Command Table. Read Mode The device can be put into a standard READ mode by initiating a write cycle with 00H on the data bus. ...

Page 10

CAT28F010 (1) Figure 5. Chip Erase Algorithm START ERASURE APPLY V PPH PROGRAM ALL BYTES TO 00H INITIALIZE ADDRESS INITIALIZE PLSCNT = 0 WRITE ERASE SETUP COMMAND WRITE ERASE COMMAND TIME OUT 10ms WRITE ERASE VERIFY COMMAND TIME OUT 6 ...

Page 11

... Figure 7. During the first write cycle, the command 40H is written into the command register. During the second write cycle, the address of the memory location to be programmed is latched on the falling edge of WE, while the data is latched on the rising edge of WE. The program operation terminates with the next rising edge of WE ...

Page 12

CAT28F010 Figure 7. Programming Algorithm START PROGRAMMING APPLY V PPH INITIALIZE ADDRESS PLSCNT = 0 WRITE SETUP PROG. COMMAND WRITE PROG. CMD ADDR AND DATA TIME OUT 10 s WRITE PROGRAM VERIFY COMMAND TIME OUT 6 s READ DATA FROM ...

Page 13

Program-Verify Mode A Program-verify cycle is performed to ensure that all bits have been correctly programmed following each byte programming operation. The specific address is already latched from the write cycle just completed, and stays latched until the verify is ...

Page 14

CAT28F010 A.C. CHARACTERISTICS, Read Operation V = +5V 10%, unless otherwise specified. CC JEDEC Standard Symbol Symbol Parameter t t Write Cycle Time AVAV Address Setup Time AVEL Address Hold Time ELAX AH t ...

Page 15

EXAMPLE OF ORDERING INFORMATION Prefix Device # CAT 28F010 Product Number Optional Company ID ORDERING INFORMATION ...

Page 16

... D Added Green Packages in all areas. 15-Oct-08 E Eliminate PDIP SnPb package. 17-Nov-08 F Change logo and fine print to ON Semiconductor 31-Jul-09 G Update Absolute Maximum Ratings Update Example of Ordering Information Update Ordering Information table ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein ...

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