IC OTP 512KBIT 200NS 28SOIC

27C512AT-20/SO

Manufacturer Part Number27C512AT-20/SO
DescriptionIC OTP 512KBIT 200NS 28SOIC
ManufacturerMicrochip Technology
27C512AT-20/SO datasheet
 

Specifications of 27C512AT-20/SO

Format - MemoryEPROMsMemory TypeOTP EPROM
Memory Size512K (64K x 8)Speed200ns
InterfaceParallelVoltage - Supply4.5 V ~ 5.5 V
Operating Temperature0°C ~ 70°CPackage / Case28-SOIC (7.5mm Width)
Lead Free Status / RoHS StatusRequest inventory verification / Request inventory verification  
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FIGURE 1-2:
PROGRAMMING WAVEFORMS (1)
V
IH
Address
V
IL
V
IH
Data
V
IL
6.5 V (3)
V
5.0V
CC
V
IH
CE
V
IL
t
CES
13.0 V (3)
OE/V
PP
V
IL
t
PRT
Notes:
(1)
The input timing reference level is 0.8V for V
(2)
t
and t
are characteristics of the device but must be accommodated by the programmer.
DF
OE
(3)
V
= 6.5V ±0.25V, V
CC
TABLE 1-6:
MODES
Operation Mode
Read
Program
Program Verify
Program Inhibit
Standby
Output Disable
Identity
X = Don’t Care
1.2
Read Mode
(See Timing Diagrams and AC Characteristics)
Read Mode is accessed when
a)
the CE pin is low to power up (enable) the chip
b)
the OE/V
pin is low to gate the data to the
PP
output pins
2004 Microchip Technology Inc.
Program
Address Stable
t
AS
Data In Stable
t
DH
t
DS
t
VCS
t
PW
t
OES
t
OEH
t
OR
t
OPW
and 2.0V for V
IL
= V
= 13.0V ±0.5V for express programming algorithm.
PP
H
CE
OE/V
A9
PP
V
V
X
IL
IL
V
V
X
IL
H
V
V
X
IL
IL
V
V
X
IH
H
V
X
X
IH
V
V
X
IL
IH
V
V
V
IL
IL
H
For Read operations, if the addresses are stable, the
address access time (t
CE to output (t
CE
after a delay (t
OE
27C512A
Verify
t
AH
Data Out Valid
t
DF
(2)
t
CE
(2)
.
IH
O0 - O7
D
OUT
D
IN
D
OUT
High Z
High Z
High Z
Identity Code
) is equal to the delay from
ACC
). Data is transferred to the output
) from the falling edge of OE/V
.
PP
DS11173G-page 5