AT24C04A-10PC-1.8 Atmel, AT24C04A-10PC-1.8 Datasheet
AT24C04A-10PC-1.8
Specifications of AT24C04A-10PC-1.8
Related parts for AT24C04A-10PC-1.8
AT24C04A-10PC-1.8 Summary of contents
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... SCL GND 6 9 SDA 8-Pin PDIP VCC SCL GND 4 5 SDA 8-Pin SOIC VCC SCL GND 4 5 SDA 8-Pin TSSOP VCC SCL GND 4 5 SDA 2-Wire Serial EEPROM 2K (256 (512 (1024 x 8) AT24C02A AT24C04A AT24C08A AT24C02A/04A/ 08A Rev. 0976B–07/98 1 ...
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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The AT24C04A uses the A2 and A1 inputs for hard wire addressing and a total of four 4K devices may be addressed on a single bus system. The A0 pin con- nect. ...
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... AT24C02A, 2K SERIAL EEPROM: Internally organized with 256 pages of 1-byte each, the 2K requires an 8 bit data word address for random word addressing. AT24C04A, 4K SERIAL EEPROM: The 4K is internally 24C08A organized with 256 pages of 2-bytes each. Random word addressing requires a 9 bit data word address. ...
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... STOP bit and the completion of any internal operations. MEMORY RESET: After an interruption in protocol, power loss or system reset, any 2-wire part can be reset by follow- ing these steps:(a) Clock cycles, (b) look for SDA high in each cycle while SCL is high and then (c) create a start condition as SDA is high ...
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Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O) Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT WORD n Note: 1. The write cycle time t WR clear/write cycle. ACK STOP CONDITION is the ...
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Data Validity Start and Stop Definition Output Acknowledge AT24C02A/04A/08A 6 ...
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... This address stays valid between operations as long as the chip power is maintained. The address “roll over” during read is from the last byte of the last memory page to the first byte of the first page. The address “roll over” during write is from the last byte of the current page to the first byte of the same page ...
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... As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word Figure 1. Device Address Figure 2. Byte Write SDA LINE Figure 3. Page write ...
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Figure 4. Current Address Read SDA LINE Figure 5. Random Read DEVICE T ADDRESS SDA LINE Figure 6. Sequential Read DEVICE T D ADDRESS M L ...
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AT24C02A Ordering Information t (max) I (max) I (max (ms) (µA) (µA) 10 3000 18 3000 18 10 1500 4 1500 4 10 1000 4 1000 4 10 800 3 800 3 8P3 8-Lead, 0.300" Wide, Plastic ...
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... AT24C04A-10PC-2.7 AT24C04AN-10SC-2.7 AT24C04A-10SC-2.7 AT24C04A-10TC 100 AT24C04A-10PI-2.7 AT24C04AN-10SI-2.7 AT24C04A-10SI-2.7 AT24C04A-10TI-2.7 100 AT24C04A-10PC-2.5 AT24C04AN-10SC-2.5 AT24C04A-10SC-2.5 AT24C04A-10TC-2.5 100 AT24C04A-10PI-2.5 AT24C04AN-10SI-2.5 AT24C04A-10SI-2.5 AT24C04A-10TI-2.5 100 AT24C04A-10PC-1.8 AT24C04AN-10SC-1.8 AT24C04A-10SC-1.8 AT24C04A-10TC-1.8 100 AT24C04A-10PI-1.8 AT24C04AN-10SI-1.8 AT24C04A-10SI-1.8 AT24C04A-10TI-1.8 Package Type Options Package Operation Range 8P3 Commercial 8S1 ( 14S 8T 8P3 Industrial ...
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AT24C08A Ordering Information t (max) I (max) I (max (ms) (µA) (µA) 10 3000 18 3000 18 10 1500 4 1500 4 10 1000 4 1000 4 10 800 3 800 3 8P3 8-Lead, 0.300" Wide, Plastic ...
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Packaging Information 8P3, 8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP) Dimensions in Inches and (Millimeters) JEDEC STANDARD MS-001 BA .400 (10.16) .355 (9.02) PIN 1 .300 (7.62) REF .210 (5.33) MAX .100 (2.54) BSC SEATING PLANE .150 (3.81) .115 ...
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AT24C02A/04A/08A 14 ...
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15 ...
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... No licenses to patents or other intellectual prop Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life suppor t devices or systems. ...